Hello guys

Noob here and its been a while since I did audio amps, but I recently got back into them and as usual, have run into a little problem. As i looked around for material, i came across this site https://ludens.cl/Electron/audioamps/AudioAmps.html Very informative and the owner (Manfred) goes a little bit into detail describing the evolution of his project, but it's the last schematic that brought me to a grinding halt. In order to get rid of crossover distortion in the output stage, he introduces a Vbe multiplier and a current source to supply power to both the Vbe multiplier and the out put transistors. I know it works and its a common circuit because i have already seem a bunch of them already, but doesn't that bring about problems of its own. For instance, right off the top of my head, it seems to me that the voltage swing from the op amp can go as low as the op amp will go, but on the positive swing, it cant exceed 12v - (1.4v + 0.2v + 0.7v) = 9.7v. The 1.4v for the Vbe multiplier, 0.2v for the minimum Vce of Q4, and 0.7v for R6. The way i see it, if the output from the op amp exceeds 9.7v, Q4 would cut out because the collector voltage has risen beyond the emitter voltage and therefore current wouldn't flow. This would in turn cut supply to Q3, eliminating the output bias all together. I believe there would still be some leakage current through R6, and the emiter-base junction of Q4 would act as a diode, but thats irrelevant. From what I have gathered, the minimum output voltage the 4558 (which I'm using for this project) would achieve in this particular schematic is about 1.5v. So with that in mind, does that mean the we can only get about (9.7v - 1.5v) 8.3v swing out of the 4558 with this set up? I know that I would probably at best get a 9 volt (-1.5v from both rails at 12v) swing out of a cheap op amp like the 4558 and there isn't that much difference between 8.3v and 9v in practical terms, but I'd just like to confirm that my theory is correct so i can get a better understanding of the limitations of this design to avoid problems.

If my theory is correct, that would mean R1 and R2 would have to be re-adjusted if i want to use the whole dynamic range of the circuit, because there's a greater loss on the positive swing than there is on the bottom swing. Probably change R1 and R2 to get somewhere about 5.6 volts out of the divider to avoid clipping the positive swing.

I'd appreciate anyone's helpful thoughts.

 

Your theory looks correct to me.

 

See

 

See
View attachment 159949

Thanks for taking your time to simulate the circuit. I don't have much experience using LT Spice or any circuit simulator for that matter, but it seems my theory is correct. I can see the V(boost) curve being projected further than what would apparently be the supply voltage (12v). V(e) I'm assuming is the output of the op amp plus 1 diode drop, and matches V(boost) plus a slightly higher DC offset. Am i right?

 

Inbaine12,
Let's return to your first question.You are not right.The original amplifier has the correct ratio of the resistor values of the divider.The operational amplifier can generate a minimum voltage of about 2.1V above the negative supply!The limitation in this amplifier occurs almost symmetrically.Therefore, by optimizing the divisor, you do not improve the circuit.Note that in the modernized scheme I changed the divisor!This made it possible to obtain a large output power.
The circuit of the voltage boost could have a lower voltage.The positive half-wave is limited by saturation of npn of the output transistor.This circuit will work without a diode.
See

 

the voltage swing from the op amp can go as low as the op amp will go, but on the positive swing, it cant exceed 12v - (1.4v + 0.2v + 0.7v) = 9.7v.

On further analysis (courtesy of LTspice), the opamp output can go as high as it will. The voltage across the Vbe multiplier (Q3) isn't constant: it reduces from ~1.9V to ~0.6V as the opamp output rises to a point where Q4 saturates (Vc=Ve-~50mV) and the R6 current is still about 5mA. This enables the base of Q1 to get within about 0.5V of the positive rail.
A bias of ~6.5V on the non-inverting input of the opamp seems optimum for symmetrical clipping at the circuit output.

 

Inbaine12,
Let's return to your first question.You are not right.The original amplifier has the correct ratio of the resistor values of the divider.The operational amplifier can generate a minimum voltage of about 2.1V above the negative supply!The limitation in this amplifier occurs almost symmetrically.Therefore, by optimizing the divisor, you do not improve the circuit.Note that in the modernized scheme I changed the divisor!This made it possible to obtain a large output power.
The circuit of the voltage boost could have a lower voltage.The positive half-wave is limited by saturation of npn of the output transistor.This circuit will work without a diode.
See
View attachment 159981

I don't understand how V(bnpn) and V(bpnp) are 180 degrees out of phase with one another in your last simulation. I thought they would be in phase, with V(bnpn) riding a 1.4vdc above V(bpnp) because the relative collector-emitter voltage of Q3 (the Vbe multiplier transistor in the original circuit) remains constant. I think it's safe to say that when designing a similar circuit, i'd have to avoid going to within 2 volts of the rails to cater for the op amp limitations and the voltage required for the current source and bias circuit. This would of course limit the output ac voltage, but i could consider a lower coil resistance speaker (4 ohms), or better still, a higher supply voltage. Perhaps 24v. I have got a book on high power audio amp design that's a little complicated for me to understand, but can understand why high voltages (in the neighborhood of 48 - 64 volts) are used! the darlington pairs in the output stage eat up a lot of bias voltage!

 

On further analysis (courtesy of LTspice), the opamp output can go as high as it will. The voltage across the Vbe multiplier (Q3) isn't constant: it reduces from ~1.9V to ~0.6V as the opamp output rises to a point where Q4 saturates (Vc=Ve-~50mV) and the R6 current is still about 5mA. This enables the base of Q1 to get within about 0.5V of the positive rail.
A bias of ~6.5V on the non-inverting input of the opamp seems optimum for symmetrical clipping at the circuit output.

Alec_t,
My point exactly, when the voltage from the op amp goes too high, it cuts out the Vbe circuit! The voltage across the Vbe may be 1.9V, but as the output from the op amp gets higher, so does the voltage at the top of the Vbe multiplier, by the same margin. Say for instance, if the output from the op amp is 6v and rising, that above the Vbe multipler would be 7.9v and rising as well. By the time the output from the op amp has risen to about 9.2v, that would be the point at which Q4 would saturate, any higher and the whole biasing circuit would collapse due to lack of voltage. It gets to a point where the collector emitter voltage across Q4 is as low as it can get (approx. 0.2V), and if the output from the op amp continues getting higher, Q4 cuts conduction.

 

I output on plot V (VCC, Bn) = V(VCC) -V(bn) and V (bp) ==> 180 degrees.
V(VCC) -V(bn) is shifted 180 degrees from V (bn) !
I do not advise you to boost the output power, becauseat the output are weak transistors.
I advise you to master the LTspice program and then you will be able to find answers in many cases.

 

I output on plot V (VCC, Bn) = V(VCC) -V(bn) and V (bp) ==> 180 degrees.
V(VCC) -V(bn) is shifted 180 degrees from V (bn) !
I do not advise you to boost the output power, becauseat the output are weak transistors.
I advise you to master the LTspice program and then you will be able to find answers in many cases.

Solid advice! Thanks for your guidance though.I'll definitely start with LT Spice because every once in a while i end up with little such problems. I have been using NL5 but it completely SUCKS!!! Besides, it assumes perfect components with no limitations!

 

Besides, it assumes perfect components with no limitations!

You also have to be aware of component limitations, or their absence, with LTS models. For example, semicon junction breakdown usually isn't inherently modelled.