Hi, I am using Spectre, a CAD tool that can simulate analog circuits, to simulate the control logic(the one that I have designed) of a 3-bit ADC. Spectre doesnt have basic logic circuits, like AND, OR gates, so I have to build those logic circuits using transistors. For example, for the NAND gates, I connected two NMOS in series and two PMOS in parallel. I also built different types of flip-flops.
The problem is when I simulated the control logic of a 3-bit ADC, Spectre gave me a result that was different than the one that was produced by Quartus II 4.0 (Quartus is CAD tool that has basic logic circuits). Quartus II gave me the right result, which was the result that I want.
I have already checked each one of the basic logic circuit that I have built and they all work fine. It's just that when I connect them together, the result becomes wrong. Why is this??
Btw, I have already tried putting a voltage buffer after the output of the gate to make sure that the logic gate that I have built can drive a large capacitive load.
The problem is when I simulated the control logic of a 3-bit ADC, Spectre gave me a result that was different than the one that was produced by Quartus II 4.0 (Quartus is CAD tool that has basic logic circuits). Quartus II gave me the right result, which was the result that I want.
I have already checked each one of the basic logic circuit that I have built and they all work fine. It's just that when I connect them together, the result becomes wrong. Why is this??
Btw, I have already tried putting a voltage buffer after the output of the gate to make sure that the logic gate that I have built can drive a large capacitive load.