I'm trying to design an analog switch to switch a signal on and off, for this I was thinking to make my own transmission gate with 2 mosfets.

Setup:
I have a piezo transducer that I use to send a pulse and then listen to it for the reflected pulse. Since the start pulse has a high voltage (> +-30V), I need to protect the aqcuisition circuit. (The return pulse is an order smaller than the send pulse and needs amplification).

I've made this circuit in LTspice and it seems to block the positive part of the sine wave I feed it. However the negative part doesn't gets blocked and I don't know how I can modify the circuit to also block the negative part.



So, when V(pulse_n) is high, the signal should be blocked, is V(pulse_n) low, the signal should be passed through.
V(pulse_p) is the inverse of V(pulse_n)

 

That configuration won't work since the substrates are tied to the source of the transistors, which means the parasitic substrate diodes are forward biased and conduct for negative signals.
In a CMOS transmission gate the substrates are tied to the plus and minus supply connections.
Also most MOSFETs are limited to a 20V Vgs maximum voltage.

One option is to use the MOSFETs as a shunt attenuator (LTspice simulation of example circuit below):

Another is to use a high voltage analog switch such as one of these.
Those will need a plus and minus power supply voltage which is equal to or greater than the plus and minus peak voltage of your signal.

 

(The return pulse is an order smaller than the send pulse and needs amplification).

What do you mean by "an order"? Do you mean "an order of magnitude" so that the signal is +/- 3V, or is it smaller than that?

 

I'm trying to design an analog switch to switch a signal on and off, for this I was thinking to make my own transmission gate with 2 mosfets.

Setup:
I have a piezo transducer that I use to send a pulse and then listen to it for the reflected pulse. Since the start pulse has a high voltage (> +-30V), I need to protect the aqcuisition circuit. (The return pulse is an order smaller than the send pulse and needs amplification).

I've made this circuit in LTspice and it seems to block the positive part of the sine wave I feed it. However the negative part doesn't gets blocked and I don't know how I can modify the circuit to also block the negative part.

View attachment 235489

So, when V(pulse_n) is high, the signal should be blocked, is V(pulse_n) low, the signal should be passed through.
V(pulse_p) is the inverse of V(pulse_n)

Hello

Here is an example.

When the clock is high both switches (P/N MOS) should be ON to pass the signal, and OFF to block.
I used the pmos4 and nmos4 symbols because they have a separate substrate pin.

I chose the mos params just for this example and is not intended to exhibit real analog switch behavior.
You would need good complementary nmos and pmos models to make an analog switch.

 

You would need good complementary nmos and pmos models to make an analog switch.

Do they sell such MOSFETs with a separate substrate connection?

 

Do they sell such MOSFETs with a separate substrate connection?

No. What I've shown how to make a transmission gate using primitives in LTspice. Transmission gates are used to make an analog switch (and other devices) in an IC. This type of mosfet would only be used in IC design.

 

Are you sure that you need an analogue switch? Won't a limiter do the job? It's a lot simpler.
If you need to gate the signal, you can do it after the limiter with an ordinary analogue switch.

 

First off, thanks all for your reply and to give me some stuff to think about/look more into. Interesting replies.

That configuration won't work since the substrates are tied to the source of the transistors, which means the parasitic substrate diodes are forward biased and conduct for negative signals.
In a CMOS transmission gate the substrates are tied to the plus and minus supply connections.
Also most MOSFETs are limited to a 20V Vgs maximum voltage.

I see, I should read more about MOSFET's. I use them plenty in digital logic circuitry, but in an analogue setting I'm still learning.

One option is to use the MOSFETs as a shunt attenuator (LTspice simulation of example circuit below):

Ooh, I need to test this out. Looks promising. I already tried it, but with only 1 MOSFET to ground, didn't give me the results I wanted.

Another is to use a high voltage analog switch such as one of these.
Those will need a plus and minus power supply voltage which is equal to or greater than the plus and minus peak voltage of your signal.

Thanks for another solution to the problem. Though I rather don't have to supply +-30-40V (something that was also bothering me in my first design but did not mention in OP)

What do you mean by "an order"? Do you mean "an order of magnitude" so that the signal is +/- 3V, or is it smaller than that?

Yes, sorry. "an order of magnitude". Return signal is even less than that. Something in the lines of 0.05-0.3V.

When the clock is high both switches (P/N MOS) should be ON to pass the signal, and OFF to block.
I used the pmos4 and nmos4 symbols because they have a separate substrate pin.

I chose the mos params just for this example and is not intended to exhibit real analog switch behavior.
You would need good complementary nmos and pmos models to make an analog switch.

I've noticed there are MOSFET's with a separate pin. What are the advantage to those?

No. What I've shown how to make a transmission gate using primitives in LTspice. Transmission gates are used to make an analog switch (and other devices) in an IC. This type of mosfet would only be used in IC design.

Oh I see. So they'll probably get used in IC's like MAX147x's that @crutschow proposed.

Are you sure that you need an analogue switch? Won't a limiter do the job? It's a lot simpler.
If you need to gate the signal, you can do it after the limiter with an ordinary analogue switch.

What do you mean by 'gate the signal'?
And no, I'm not sure I need an analogue switch, if there is another better solution. And your limiter circuit also looks promising. I guess the 2 zeners limit the output voltage?

To recap the setup: I have a driver circuit that makes a higher voltage pulse. This pulse activates the piezo, the piezo sends out a wave, the wave gets reflected back to the piezo. This electrical signal needs to be amplified. However, the first pulse may not damage the circuitry so I need something to seperate the driver circuit and the receiver circuit that both are connected to the same piezo.

 

What do you mean by 'gate the signal'?

If you want to remove the drive signal from the circuits that process the amplified return signal, then, once it is down at a manageable level, you can switch it off with an ordinary analogue switch.

And no, I'm not sure I need an analogue switch, if there is another better solution. And your limiter circuit also looks promising. I guess the 2 zeners limit the output voltage?

I don't know the output impedance of the transducer as a receiver, but it may be possible for the limiter to be a limiting amplifier, so that it amplifies your 30mV return signal, but just clips using the zeners when it receives the drive signal.
It clips at ±(Vzener+0.6V). It is better than simply allowing the amplifier to saturate, as amplifiers don't always recover quickly or neatly from being driven into saturation.

 

If you want to remove the drive signal from the circuits that process the amplified return signal, then, once it is down at a manageable level, you can switch it off with an ordinary analogue switch.

I don't know the output impedance of the transducer as a receiver, but it may be possible for the limiter to be a limiting amplifier, so that it amplifies your 30mV return signal, but just clips using the zeners when it receives the drive signal.
It clips at ±(Vzener+0.6V). It is better than simply allowing the amplifier to saturate, as amplifiers don't always recover quickly or neatly from being driven into saturation.

I see, that's quite smart.
I've ordered some parts to try the limiting circuit too.

In the meantime I also soldered the circuit of crutshow onto perf board. Only thing holding me back is how to switch the -10V on the gate of the pMOSFET. Atm I always toggled with a GPIO from the atmega64m1, though now I need a negative pulse. Doing my research now.

 

Only thing holding me back is how to switch the -10V on the gate of the pMOSFET.

Here's the circuit using a PNP transistor to convert a positive pulse into the negative pulse for the P-MOSFET gate.
You do need a negative 10V to 12V supply of course.
Note that the P-MOSFET state is inverted, i.e. a plus input to the PNP turns the MOSFET OFF and 0V (or open input) turns it ON.

 

Here's the circuit using a PNP transistor to convert a positive pulse into the negative pulse for the P-MOSFET gate.
You do need a negative 10V to 12V supply of course.
Note that the P-MOSFET state is inverted, i.e. a plus input to the PNP turns the MOSFET OFF and 0V (or open input) turns it ON.

Thank you again!

I did need to play with some values as I didn't get the same as yours. I've entered the correct components that I've ordered (only DMP4065 will get replaced by DMP4025 as RS didn't have the former).



I lowered R4 and R3 as if I let it be, I get some delays as the gate doesn't get (dis)charged quick enough (I think). Also I've picked a smaller R2 as I saw some attenuation when using 1K.

I'm planning on using the TC4425A as a MOSFET driver, so I can use a GPIO from the MCU. With this I only need one pin too as the TC4425 has a inverting output.

And yes, I have a positive and negative voltage supply, as the receiving circuit will use opamps with dual supply. (Not decided on 12V or 15V, will need to do more testing)

 

I've updated my circuit to add the pulse driver and piezo in the simulation. I get some nice results (the last blue pulse is the one I'm after to amplify, that's the reflection). Thank you guys for your time.



Next step is to add my receiver circuit to OUT. However, I've ordered the MCP6022 opamp and they only have a PSPICE model, when adding that to the circuit, my simulation won't run anymore. Is it because I need to change some stuff in the file? Do I make a new topic for this opamp in the "PCP Layout, EDA & Simulations" section?

 

I've updated my circuit to add the pulse driver and piezo in the simulation. I get some nice results (the last blue pulse is the one I'm after to amplify, that's the reflection). Thank you guys for your time.

View attachment 236114

Next step is to add my receiver circuit to OUT. However, I've ordered the MCP6022 opamp and they only have a PSPICE model, when adding that to the circuit, my simulation won't run anymore. Is it because I need to change some stuff in the file? Do I make a new topic for this opamp in the "PCP Layout, EDA & Simulations" section?

Hello, @speklap. Would you mind attaching the asc file shown in your last post?

I'd like to see if I can tweak it a little and study its results.

 

Hello, @speklap. Would you mind attaching the asc file shown in your last post?

I'd like to see if I can tweak it a little and study its results.

Sure thing, thank you for taking an interest.

I wanted to include a single stage of my receiver end (inverting opamp topology, 100x for now) disconnected, but it didn't want to simulate anymore, so I didn't include it.


EDIT:
Used another opamp in the simulation (LT1469) and now I start to get somewhere. I also added a resistor to ground after the DC blocking capacitor to pull the line faster to ground.


EDIT 2:
With a chebyshev BPF I'm able to remove the 'square wave part' from Vout, however I get some ringing instead. It stays inside the supply boundaries though.

 

So it's time for an update. I've made the setup with 2 piezo's sending to eachother. In the following scope images, the yellow trace is the sending of 1 piezo (left), measured directly at the piezo (Vpiezo). the green trace is the receiving and sending of the other piezo (right), measured after the BPF (Vout). So 2 piezos, 2 circuits.

Here we can see the left piezo first sends a pulse, that gets picked up by the right piezo and after that it sends a pulse back. However, the sending of the pulse on the right piezo puts the BPF into oscillation.




___________________________________________________________________________________

Here we see the send pulse in close up. I've noticed that by changing the gate resistor I can play with the ringing (and damping together with the resistor parallel to the piezo). And I think it's overdamped now, but need to do more tests.



Our receive pulse on the right piezo


And the send pulse on the right piezo, measured after the BPF. As we can see, it gets into oscillation. Not sure why yet though.


As bonus, both traces are on the right piezo, the yellow is measured at Vpiezo, the green is measured at Vout (after BPF)

 

A Chebyshev filter is significantly underdamped, which generates the ringing you are seeing.
A Bessel filter has a less sharp rolloff but would have little ringing.
A Butterworth filter would be rather in the middle of those two with better rolloff than the Bessel, but still some ringing.

 

A Chebyshev filter is significantly underdamped, which generates the ringing you are seeing.
A Bessel filter has a less sharp rolloff but would have little ringing.
A Butterworth filter would be rather in the middle of those two with better rolloff than the Bessel, but still some ringing.

Thanks! Will be testing the other filters next week. Did not know Chebyshev is underdamped, I was looking at frequency responses.

However, did some more reading too and a charge amplifier also looks interesting. It also acts as an BPF.

 

did some more reading too and a charge amplifier also looks interesting. It also acts as an BPF.

Yes, that's a simple BPF which has the characteristics of a passive LP and HP filter in series with a low Q factor, so will not have a sharp transition from LP to HP, but that may not be important in your application.

It's technically not an active filter, since the op amp is simply acting as an amplifier, with the 1-pole HP at the input, and the 1-pole LP in the feedback loop.
An active filter has multiple feedback points (MFB filter) or some positive feedback (Sallen-Key filter) to generate the higher Q factors needed for a sharper transition.

 

Yes, that's a simple BPF which has the characteristics of a passive LP and HP filter in series with a low Q factor, so will not have a sharp transition from LP to HP, but that may not be important in your application.

It's technically not an active filter, since the op amp is simply acting as an amplifier, with the 1-pole HP at the input, and the 1-pole LP in the feedback loop.
An active filter has multiple feedback points (MFB filter) or some positive feedback (Sallen-Key filter) to generate the higher Q factors needed for a sharper transition.

Thanks again for the info.

Atm, I'm looking to make a prototype PCB with different filters on it to test, and I'll add the charge amp aswell.

A follow-up question. I'm reading through filter designs as my knowledge is a bit rusty. You've said that my filter that I use now (post #15) is a Chebyshev filter but it's also a MFB filter?

The thing I have problem with now is how to implement a Bessel BPF in a Sallen-Key topology. (I think that's the best case for me, as it has a flat pass band, and I don't think I really need a sharp roll-off.) I also implement the Butterworth variant to see the differences.
Wikipedia has a nice figure with some math (https://en.wikipedia.org/wiki/Sallen–Key_topology#Application:_bandpass_filter), however I have no idea if it's Bessel/Butterworth or something else.