Hi everyone
I need to design an error amplifier for an LDO in umc 65nm technology. I have read lots of papers about it but still don't know where to start and how to reach my specifications.Any body has any hints for me?

 

Input+error=Output
error=Output-Input
So.
Take input signal, split it into two signals, Signal 1 and Signal 2.
Signal 1 goes into the circuit that produces output. Take the output and feed it into Difference Amplifier.
Signal 2 goes into Difference Amplifier.
Now you have original input signal (Signal 2) and output signal going into difference amplifier, the result is the amplified error.

No idea what 65 nm has to do with it. That something you will have to figure out.

 

Thanks for your help.But here is videos I found on youtube. This explains the design process in 180nm for a usual amplifier. But I'm not sure if I can use the same procedure
https://www.youtube.com/watch?v=Qbx0YI6UjoE

 

You might find some help from this article. It is based on a very old CMOS MOSFET array and most likely some aspects of the design are outdated, but it might be a good starting point for you.

http://www.bu.edu/eng/courses/ec410/documents/mosfet-differential-amplifier.pdf

The link below can provide more inspiration
http://bit.ly/1qSG3Hc