i couldnt differentiate delay line memories and sram.Since both using flipflops.who they are differentiated whats the dis advantage in DL memories.Thank you in advance

 

Delay lines are sequential- operation similar to shift registers (think LIFO, LILO, FIFO and FILO). Whereas SRAM can be accessed randomly. Given the difference, what do you see as a disadvantage?

 

speed
delay line require more time ,because it must be in sequence.
Another question.what makes sram to access data at random unlike delay line memories

 

By design. The original delay lines were intended to delay, not to provide access to, or allow change of, an individual memory location (bit address) at any given time. As the name implies, the purpose is to "delay" the transmisson of data rather than processing it in real time.

 

why they need delay the transmission?what is the need?

 

Usually it involves synchronization with another process. Sometimes they're useful in data averaging. There are many reasons.