Hi,

I'm trying to construct a simple memory circuit using a 74LS175 Quad D Flip Flop. I have the circuit wired as shown in the picture attached on a breadboard. I'm using the 5V pin on my Raspberry Pi as a power supply. The problem I'm having is that when I "artificially" use a switch as the clock for the IC , the output doesn't follow the input which is constantly HIGH. I've tested both the LEDs and the resistors and they work fine, I think it might be that the RPi can't drive the IC or that the IC is dead, but I've dried multiple 74LS175s and I've had no luck.

Could anyone please help me? I've been trying to figure out this circuit for two years now, originally with transistors until my lecturers advised me to move away from transistors when IC's have everything I'll ever need.

Thank you so much

 

Welcome to AAC!
The Clk input needs a pull-down (e.g. a 2k2 resistor), but it remains high the way you have things wired in that schematic.
This is what the datasheet says:-
"Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse.
When the clock input is at either the HIGH or LOW level, the D input signal has no effect at the output."

 

Thank you so so much!!!!

I had almost given up hope on this and I was rather upset. So is what you're saying that the 2k2 resistor will solve my problem? I understand that its as the voltage goes from null to positive that Q follows D,but I do not understand how flicking a switch on and off not cause this to happen? Also how does the resistor help?

Again, thank you so much for replying

 

Welcome to AAC!
The Clk input needs a pull-down (e.g. a 2k2 resistor), but it remains high the way you have things wired in that schematic.
This is what the datasheet says:-
"Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse.
When the clock input is at either the HIGH or LOW level, the D input signal has no effect at the output."

Thank you so so much!!!!

I had almost given up hope on this and I was rather upset. So is what you're saying that the 2k2 resistor will solve my problem? I understand that its as the voltage goes from null to positive that Q follows D,but I do not understand how flicking a switch on and off not cause this to happen? Also how does the resistor help?

Again, thank you so much for replying

Also sorry I didn't realize I had to reply directly to your comment, whoops

 

An additional problem could be mechanical switch contact bounce which can look like several clock pulses to the fast logic circuit.
One way to minimize this bounce to to add a 10uF cap in parallel with the 2.2kΩ resistor to ground along with a 100Ω resistor in series with the switch.

Of course, in your circuit switch bounce is not a problem since, with the D input high, the FF can only assume one state after the clock pulse(s).

If you want the FF to toggle at each button push, connect the 1D input to the 1NQ output.
In that case you would need the debounce circuit.

 

Thank you so so much!!!!

I had almost given up hope on this and I was rather upset. So is what you're saying that the 2k2 resistor will solve my problem? I understand that its as the voltage goes from null to positive that Q follows D,but I do not understand how flicking a switch on and off not cause this to happen? Also how does the resistor help?

Again, thank you so much for replying

The resistor is needed, because otherwise the clock input is floating and its state is undefined, when the switch is open.

 

If you read the datasheet CAREFULLY you will see that a Low Power Schottky (LS) part CANNOT source much current. You might get a couple of hundred microamps if you are lucky and the LED will be very dim. Use a CMOS part for better sesults.

 

I do not understand how flicking a switch on and off not cause this to happen? Also how does the resistor help?

The 74LS input has an internal ~20k pull-up resistor to +5V. By connecting a 2k2 pull-down resistor to ground you create a potential-divider, so when the switch is open the input voltage will be ~ 5*2.2/22.2 ~=0.5V, which is logic 0. When the switch closes the input rises to 5V, which is logic 1.