Hi All,
I am having some issues with shoot-through currents in my LTSpice simulation. I am using the LTC3722-2 phase shift controller, but using it slightly differently than you would with a full bridge phase-shifter.
I am instead having two paralleled half-bridges, driven by the chip. The idea is that when the gate signals are in phase, the maximum power is delivered, and by shifting the active leg w.r.t the passive leg, the amount of power delivered to the secondary is modulated. I have done this in alternative software and it seems to work, but with LTSpice there is something funny going on with the gate drive waveforms which cause some spikes in the FETs, particularly when the I am close to the reference voltage. It seems like the gate signals are turning ON/OFF when I don't want them to.
I have also attached an LCC network to each half bridge, because of the high voltage transformers that are included in the design. One reason I pitch could be the reason for the spikes in the gate waveforms is because of the resonant energy in the tank.
I will attach my schematic from LTSpice in hope that someone can help me figure this out. One issue Im having is the data sheet is very focussed on the current mode of operation, and does not include any information on how to generate the RAMP or what it does in the chip. Currently I generate a ramp derived from the VREF of the chip and the oscillator using a PNP transistor. But I am unsure whether I am operating the chip correctly.
In principle the converter seems to be working other than these aforementioned issues - it could also be that I have not yet compensated the network properly, as I am having issues doing so. But I think these issues would exist even if the compensation was properly done.
Any opinions welcome, I would really like some feedback and to get this working!
Thanks.
I am having some issues with shoot-through currents in my LTSpice simulation. I am using the LTC3722-2 phase shift controller, but using it slightly differently than you would with a full bridge phase-shifter.
I am instead having two paralleled half-bridges, driven by the chip. The idea is that when the gate signals are in phase, the maximum power is delivered, and by shifting the active leg w.r.t the passive leg, the amount of power delivered to the secondary is modulated. I have done this in alternative software and it seems to work, but with LTSpice there is something funny going on with the gate drive waveforms which cause some spikes in the FETs, particularly when the I am close to the reference voltage. It seems like the gate signals are turning ON/OFF when I don't want them to.
I have also attached an LCC network to each half bridge, because of the high voltage transformers that are included in the design. One reason I pitch could be the reason for the spikes in the gate waveforms is because of the resonant energy in the tank.
I will attach my schematic from LTSpice in hope that someone can help me figure this out. One issue Im having is the data sheet is very focussed on the current mode of operation, and does not include any information on how to generate the RAMP or what it does in the chip. Currently I generate a ramp derived from the VREF of the chip and the oscillator using a PNP transistor. But I am unsure whether I am operating the chip correctly.
In principle the converter seems to be working other than these aforementioned issues - it could also be that I have not yet compensated the network properly, as I am having issues doing so. But I think these issues would exist even if the compensation was properly done.
Any opinions welcome, I would really like some feedback and to get this working!
Thanks.
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