Counting down with odd number only. Hint please

Discussion in 'Homework Help' started by IcyIcy, Sep 29, 2014.

  1. IcyIcy

    Thread Starter Member

    Nov 17, 2012

    I have an assignment that required me to count down from 9 to 0 with odd number only on the 7 segment.
    Meaning 9 , 7 , 5 , 3, 1, 0.
    Then part 2 , I am required to count down from 5 to 0 then it will repeat itself but start from 9 to 0.
    Meaning 5 , 3 , 1, 0 , 9 , 7 , 5 , 3, 1, 0.

    Currently I can count down from 9 to 0. Any hint on how I can proceed.
  2. MrChips


    Oct 2, 2009
    0 is not an odd number.
  3. IcyIcy

    Thread Starter Member

    Nov 17, 2012
    But my assignment wants me to display 0 as well.
  4. arivvu

    New Member

    Sep 7, 2012
    why dont you create statetable with your count sequence as you done it for 9 to 0 down counter.
    (if you build that without subtractor).
  5. tshuck

    Well-Known Member

    Oct 18, 2012
    As I asked in your previous post on the matter, can you see the difference between even and odd numbers in binary?

    If not, write out the count sequence in a state table and determine which of those counts should be displayed and put a 1 in that box, then simplify the logic through a simplification technique (e.g. Boolean algebra, K-maps, Quine-McCluskey, etc.).
  6. MrCarlos

    Active Member

    Jan 2, 2010
    Hello icyicy

    But what ICs are You using to make these counters ?
    Those that could help You would be the ICs 74LS191 or 73LS190.

    I do not know how is your counter but let me assume that you are using the 74LS190.
    No problem with it because it is a decade counter. only counts from 0 to 9 upwards and downwards.
    If you want to count downward from 5 to 0, you must detect when it reaches 6 Dec, 0110 Bin, and in that instant reset to 5.

    You can also use the 74LS191 and -the mechanics to make the counters- is the same as I mentioned.
    These come in the document attached to you

    To show only odd numbers is another story.
  7. MikeML

    AAC Fanatic!

    Oct 2, 2009
    I think that sentence should read UPWARD.

    There are two ways of doing this:

    Build an up-counter that changes from 5 to 6 on a clock edge, and then add decoder logic to recognize the (temporary) 6 state, and then have the decoder asynchronously reset all of the state flip-flops to zero. This method creates a "glitch", where the state flip-flops are actually in state 6 for a few gate delays before being reset to the correct state...

    Build an up-counter that decodes state 5 as soon as the counter transitions to that state. The decoding logic sets the Next State steering logic on the inputs of the state flip-flops such that they transition synchronoulsly from state 5 to state 0 on the next clock edge. This avoids the intermediate glitch state... The latter is the "correct", "clean" way of doing this...

    If building a down-counter that has to transition from state o to state 5, you either have to allow the counter to go to -1 ( or 15 or 1111) and then force it to state 5 after the fact. Or you decode state 0 and then set the input streering logic so that the counter transitions from state 0 directly to state 5 on a clock edge.
    Last edited: Sep 30, 2014
    tshuck likes this.