If you ANDed the three output bits from the counter, and used the result to toggle a flipflop when the three bits are no longer all high, then you could use an output bit from the flipflop to provide the fourth bit.
RB, I don't think so, because the 3rd bit will go high by itself when the 3 bit counter hits the count of 4. You only want to toggle the high bit when the 3 bit counter exits the count of 7, after all three bits have gone high.
If you are using it as a ripple counter, then you can clock the next stage by the falling edge of the msb of the prior counter segment. But if you want the two segments to be synchronous, then you need to detect the terminal state and use it as a count enable signal to the next stage.