I've got a problem making this circuit...

Using the combination of D FF and JK FF or 2 D FF, i have to make a circuit that will count from 0-12...

can anyone suggest something if what gates am i going to use or to add. And what connection will I make for it to function.

any suggestion will surely be appreciated,,
tnx a lot..

 

You could always look at a counter IC's internal logic, like a 74LS161.

 

You can't count to 12 with only 2 flipflops, never mind what type. You can only count from 0 to 3 with a pair. To count to 12 you need four flipflops. To compute this number you take the ceiling of log to the base 2 of the maximum count.

ceil(log 12/log 2) = ceil(1.079181246/0.301029995)
 = ceil(3.584962501)
 = 4

 

You could always look at a counter IC's internal logic, like a 74LS161.

True, but the internal logic won't tell him how to go from the representation of 12 back to the representation of 0. In fact a designer may design the counter so it progresses through some other sequence of states like {3,4,5,6,7,8,9,10,11,12,13,14,15}. Most counters, like the 74xx161 have a TC output that makes this kind of syncronous reload a piece of cake.

 

The 7492 / 74LS92 is the basic divide-by-12 device (OK, a /2 and a /6 stage).

The datasheet for that gives it's logic diagram, it just uses 4 J-K sections.
A couple of dual J-K chips would do the same job.

Data: http://www.datasheetcatalog.org/datasheet/motorola/SN54LS92J.pdf

 

The 7492 / 74LS92 is the basic divide-by-12 device (OK, a /2 and a /6 stage).

The datasheet for that gives it's logic diagram, it just uses 4 J-K sections.
A couple of dual J-K chips would do the same job.

Data: http://www.datasheetcatalog.org/datasheet/motorola/SN54LS92J.pdf

Indubiously! Except that the OP wants a divide by 13, as there are 13 elements(states) in the set {0,1,2,3,4,5,6,7,8,9,10,11,12}