I always wondered if they used death row prisoners to thread those wires - keep doing the job and you keep on living!Wow! Your cores are smaller than I expected. I need to measure the cores that I have. I doubt the are much smaller than yours...
Core Memory (magnetic memory)
- Thread starter Art
- Start date
I have never threaded any of my cores. I just keep them to show people how small memory cores can be. They are about 1/4 inches deep in a clear plastic box that is about 4 inches square -- so I have a bunch of them! They are so small the static electricity causes them to stick to the sides of the box.
I have no idea how anyone could thread such small cores by hand, no matter what the incentive.
Present day technology could probably automate that process - now its no longer needed!I have never threaded any of my cores. I just keep them to show people how small memory cores can be. They are about 1/4 inches deep in a clear plastic box that is about 4 inches square -- so I have a bunch of them! They are so small the static electricity causes them to stick to the sides of the box.
I have no idea how anyone could thread such small cores by hand, no matter what the incentive.
Actually, I thought I saw something about small scale cores still being used for something - but can't remember what, where, why or anything.
The itty bitty magnetic memory cores that I have are about 32 mils in diameter and 7 mils thick. I estimate the the hole diameter is about 20 mils.
I am guessing that I have around a million cores in my 4" by 4" box.
The wires shown in the picture are 10 mils in diameter (30 gauge) and 2 mils in diameter (44 gauge).
edit: Wow that picture is really dark. I will correct it when I get a chance.
I am guessing that I have around a million cores in my 4" by 4" box.
The wires shown in the picture are 10 mils in diameter (30 gauge) and 2 mils in diameter (44 gauge).
edit: Wow that picture is really dark. I will correct it when I get a chance.
It was an admittedly a softcore question for a a hardcore project
I still don’t know the answer, so my solution is to wind a few transformers on different material.
So I’d probably be reading & writing memory by now if my back was better, and I wasn’t so
insistant on over engineering things
In hindsight, the resistor board should have gone inside the memory cage.
Now I still have to lead out another 32 connections from the resistor board.
The IDC sockets for the memory are underneath the resistor board,
so I could have just had a slightly higher cage with the same cables exiting from it.
I still don’t know the answer, so my solution is to wind a few transformers on different material.
So I’d probably be reading & writing memory by now if my back was better, and I wasn’t so
insistant on over engineering things
In hindsight, the resistor board should have gone inside the memory cage.
Now I still have to lead out another 32 connections from the resistor board.
The IDC sockets for the memory are underneath the resistor board,
so I could have just had a slightly higher cage with the same cables exiting from it.
Hi Guys,
Here is the current driver section for a bit of an update,
with copper plated copper for the hysteresis loop graphic.
I’ve also made a good start on the shift register section.
There’s more to it than I thought, each end of each wire requires a bit to set it’s side of the H bridge,
so that’s 32 bits, and to drive the enable lines separately requires another 16.
So that’s 48 bits of shift register memory (6x8 bit) to run the 64 bit core memory!
I considered tying all enable pins together, which in theory, should be fine if both ends of every
unused wire H bridge was both set high or low (hence no current flow), but in practice I’m not sure
it would turn out so clean, so I’ve chosen 74HC164x4 for the H bridge bits, and 2x74HC595
latching shift registers for the enable pins.
That way I should be able to preload the 32 bits of state pins, and then latch the 16 bits of enable pins,
and finally reset the pair of latched shift registers to turn it all off.
Here is the current driver section for a bit of an update,
with copper plated copper for the hysteresis loop graphic.
I’ve also made a good start on the shift register section.
There’s more to it than I thought, each end of each wire requires a bit to set it’s side of the H bridge,
so that’s 32 bits, and to drive the enable lines separately requires another 16.
So that’s 48 bits of shift register memory (6x8 bit) to run the 64 bit core memory!
I considered tying all enable pins together, which in theory, should be fine if both ends of every
unused wire H bridge was both set high or low (hence no current flow), but in practice I’m not sure
it would turn out so clean, so I’ve chosen 74HC164x4 for the H bridge bits, and 2x74HC595
latching shift registers for the enable pins.
That way I should be able to preload the 32 bits of state pins, and then latch the 16 bits of enable pins,
and finally reset the pair of latched shift registers to turn it all off.
And done
I plan next to make an LED board with extra current limiting resistors to plug in place of the memory module
to display the thing scanning. No point in a video that can’t demonstrate it working. I could have an EEPROM hidden in there.
Mounted sense receiver toroid:
Sense receiver assembly viewed from what will be the rear:
Lower shift register board:
Marline wire lacing on upper (latched) shift register board:
Completed Modules:
I plan next to make an LED board with extra current limiting resistors to plug in place of the memory module
to display the thing scanning. No point in a video that can’t demonstrate it working. I could have an EEPROM hidden in there.
Mounted sense receiver toroid:
Sense receiver assembly viewed from what will be the rear:
Lower shift register board:
Marline wire lacing on upper (latched) shift register board:
Completed Modules:
Hi Guys
I have managed to complete the high current scanning part, and tested fine.
The software can read and write memory as well, but this demo just sets all zeros,
and then reverses direction and sets all 1s.
All this with LEDs, but only tonight I might make it to test the sense pulse receiver.
I connected it to power, and it always reads high with my pic micro.
The sense pulse receiver output always reads about 2.2 Volts with a multimeter.
A question... Is this expected behaviour?
Looking at the schematic, it looks like the resistor ties the output high,
and the transistors can only ground the output, so maybe it’s got an inverted output?
If so, I might be still in business
I have managed to complete the high current scanning part, and tested fine.
The software can read and write memory as well, but this demo just sets all zeros,
and then reverses direction and sets all 1s.
All this with LEDs, but only tonight I might make it to test the sense pulse receiver.
I connected it to power, and it always reads high with my pic micro.
The sense pulse receiver output always reads about 2.2 Volts with a multimeter.
A question... Is this expected behaviour?
Looking at the schematic, it looks like the resistor ties the output high,
and the transistors can only ground the output, so maybe it’s got an inverted output?
If so, I might be still in business
blocco a spirale
- Joined Jun 18, 2008
- 1,546
Very nice project.
It looks like the output of the sense amplifier could go either way in quiescent as Q1 and Q2 are biased by the forward voltage of D1 which will be very similar to their own Vbe.
It looks like the output of the sense amplifier could go either way in quiescent as Q1 and Q2 are biased by the forward voltage of D1 which will be very similar to their own Vbe.
blocco a spirale
- Joined Jun 18, 2008
- 1,546
That's what I'm saying, with the circuit as it stands, Q1 or Q2 could be on, off or anywhere in between. This means that it could work some of the time, all of the time or not at all.
Oh, ok. This part isn’t experimental, and has been used for decades...
One would think it would be sorted out?
It’s an adaption of the example on this page, found in an old Casio calculator:
http://www.cs.ubc.ca/~hilpert/e/coremem/index.html
This one just omits the NAND gate which would invert the output.
One would think it would be sorted out?
It’s an adaption of the example on this page, found in an old Casio calculator:
http://www.cs.ubc.ca/~hilpert/e/coremem/index.html
This one just omits the NAND gate which would invert the output.
blocco a spirale
- Joined Jun 18, 2008
- 1,546
Yes, I saw that and it appears to be correct. However, the reworked version that you have (https://sites.google.com/site/wayneholder/one-bit-ferrite-core-memory) is incorrect.
In the original circuit, the diode is not there to bias the transistor. The transistors are held in the 'on' state by the 10k resistor and the current pulse momentarily switches a transistor off which causes a negative pulse at its collector.
If you draw the original circuit with everything in a more conventional orientation, its operation becomes clearer.
The author of the modified circuit made the errors when he converted the original circuit from PNP to NPN transistors resulting in something that operates on the edge of reliability.
Last edited:
Well low and behold it works
Forgive me for not wanting to pull it apart (scroll up for a picture of it),
so long as it continues to be reliable,
but it might not be my only core memory, so I will look into the sense circuit.
I have not organised bits into coherent data, but can read/write bit pattens that were recognisable on the LED test board.
Not just alternating, the current one is this:
When I clear the 64 bits all to zero I count 32 changed states. Success!!!
This is the finished thing:
Forgive me for not wanting to pull it apart (scroll up for a picture of it),
so long as it continues to be reliable,
but it might not be my only core memory, so I will look into the sense circuit.
I have not organised bits into coherent data, but can read/write bit pattens that were recognisable on the LED test board.
Not just alternating, the current one is this:
Code:
01010101
10101010
01010101
10101010
00000000
00111100
11000011
11111111This is the finished thing:
