hello all

i have a big problem and have no clue where to start, so any help will be appreciated. i am a complete noob at this so please don't flame me or throw big words at me cuz i won't be able to understand what you guys are saying

anyways,

basically i have to design a flip flop with 2 inputs X and Y, no outputs and this flip flop should function like a JK flip flop, how do i do this?

are there any notes online that would help me because i really need help.

 

There are 418,000 hits on "j k flip flop". Try this one - http://www.play-hookey.com/digital/jk_nand_flip-flop.html.

 

What is the point of a flip flop with no outputs? Anyway, you have to make a table.
X Y Q Q+

Fill in every possible combination of X,Y, and Q (8 total). Then you fill in the desired next state (Q+) for every J,K, and Q. Then find the desired FF you want to use (JK, D, SR, T, etc). Look at Q and Q+ and with this determine what the J,K (or whatever the inputs of your FF are) you will need for that Q and Q+ combination. After that make a K-Map with X,Y, and Q as the input for each variable (j,K for example). You will then have the combination logic required to implement the X,Y flip flop using a JK, D, SR, or T Flip Flop.

 

agent aren't there 16 possible inputs because there are 2 inputs or the does the X Y input means we have to create an XY flip flop

Also, i missed some important information in my original post.

we are given a flip flop with a characteristic table and using this we have to convert it into what i mentioned.

Given characteristic table:
A B Q Q+
0 0 0 0
0 0 1 1
0 1 0 0
0 1 1 0
1 0 0 1
1 0 1 1
1 1 0 1
1 1 0 0

i know how to start this off, i have to create an excitation table from this, how do i do this though, that's the question?

 

There are 8, 2^3 = 8. There are three variables, A, B, and Q. We don't consider Q+ because this is the variable we want to solve for. In sequential logic, we want to use the inputs, A and B but also the current state, Q to determine the next state Q+.

If we want to convert AB to a JK flip flop, you need to look at Q and Q+. When QQ+ = 00 then JK = 0X where X means Don't Care(the input does not matter). So in this case, J must be 0 but K can be 0 or 1. After you have the JK table, you need to make a K-map for J and K . The inputs for the K map will be ABQ and the output will be J (or K).
Example:
ABQQ+ J K
0000 0 X
0011 X 0

So for the K-Map for J, 0 would go in the box corresponding to ABQ = 000. X would go in the box correspoding to ABQ = 001. You will end up with combination logic that will use A, B, and Q. This will be connected to the J input of the JK-FF. After the combonation logic J and K are hooked up, the flip flop will function like the AB flip flop.

 

ok agent tell me if i'm doing this right

A B is the present state
Q is the input
Q+ is the next state

A B Q Q+
0 0 0 0
0 0 1 1
0 1 0 0
0 1 1 0
1 0 0 1
1 0 1 1
1 1 0 1
1 1 1 0

what do i do from here?

 

Not Quite. A and B are the inputs, Q the present output is the same thing as the present state. Q+ is the next output. Q+ depends on the values of A, B, and Q some small amount of time prior to the clock edge. In datasheets this is refereed to as the setup time. Q+ will be the output some small amount of time after the clcok edge. This is commonly refereed to as the propagation delay.

In most homework exercises the effects of setup time and propagation delay are ignored. We ignore them in real circuits at our peril however.

 

papa i didn't understand your post

i think i got it, does this look right to anyone?

A B Q Q+ W Z
0 0 0 0 0 X
0 0 1 1 X 0
0 1 0 0 0 X
0 1 1 0 X 1
1 0 0 1 1 X
1 0 1 1 X 0
1 1 0 1 1 X
1 1 1 0 X 1

and from here i can get k-maps for W and for Z right?

 

As long as you used Q and Q+ to derive the table to W and Z, you can go ahead to making the K-Maps. The K-Map should be made in the variables A, B, and Q. Q+ can be ignored for the K-Map since you won't know the next state before hand. What Papa was talking about is the gate delay in a logic circuit. Unless the problem explicitly tells you there is a delay, you don't need to worry about it. You also don't need to worry about gate delays unless you are asked to make a timing diagram.

 

No outputs? Where is the feedback taken from?

 

If there are no outputs, why not simply connect inputs through resistors to ground? Or leave them open? I don't comprehend the part about "no outputs."

 

it's a question that we recieved for an assignment and that was the conditions giving.

so don't ask me why this is including and that isn't, because i'm as lost as anybody.

btw thanks for the help guys, i think i got it.