If the rules of the game call for implementing the function using only NAND gates, the answer is "you dont", because a NOT gate is a one-input NAND gate, or if you must use two-input NANDs, then simply feed the same signal to both inputs.

Did you understand that I drew the final NAND gate solution by first drawing it using AND,OR, and INV gates, and I did the final conversion to using only NANDs by inspection.

I could just as easily have drawn the final diagram using only NOR gates. You want to see how?

I see, thats some good information, If you wouldn't mind, does help the understanding

 

OK, so the logic circuit were using is the one posted above which is using one input. (I believe)

The circuit works perfectly for my use, it gives out the correct readings.

But, how do I show that I remove the not gates? Is there a Law that I have to follow?

Thanks for the digram Mike!

If you need to show it explicitly using Boolean algebra, then you can claim that (A)' is using a NAND gate, just happens to be a one-input NAND gate, just as (ABC)' is a three input NAND gate. Now, some instructors may not recognize this generalization, so you can use what I talked about in my last post, which is to represent it as (AA)'. Note that this is exactly the method shown in MikeML's diagram earlier.

MikeML is using a graphical logic manipulation technique commonly called "bubble logic". If you put two bubbles on the ends of a line, they cancel; this means that you can invert the output of one gate, turning an AND into a NAND for instance, as long as you also invert the inputs of all the gates that signal goes to. Then you can apply DeMorgan's Theorem graphically by changing an OR to and AND, or vice-versa, as long as you invert all of the inputs and outputs of that gate, which you do by putting a bubble there if there isn't one and removing a bubble if there is.

 

I was taught to draw logic in a way to show what the designer intended, using two alternative symbols for an INV, AND, NAND, OR and NOR, as shown below: I'll let you prove that the Alternates are the logical equivalents of the Normal symbols.




I draw whichever version improves understanding. I try to draw so that invert bubbles cancel along a wire. That way, you can read a diagram of combinatorial logic by inspection.

Now back to the original expression, but this time draw it in terms of only NOR gates:



One more trick: sum of products is easier to implement using NANDs
product of sums is easier to implement using NORs