Hi all
Why do you think I get asymmetric voltage output?
Cheers
Why do you think I get asymmetric voltage output?
Cheers
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You have the emitter grounded and the bias point set to 0.68 Volts. The Q-point is very close to cutoff and the transistor AC gain is different for the positive and negative peaks. For proper AC operation the Q-point should be at or near Vcc/2. You need to add an emitter resistor and a bypass capacitor.Hi all
Why do you think I get asymmetric voltage output?
Cheers
Is this difference related to the transistor model?AC gain is different for the positive and negative peaks
I don't know, I don't have an intimate knowledge of abbreviated models. I can tell you that having no emitter resistor and setting the Q-point to almost exactly the maximum Vbe of an NPN transistor is going to make one terrifically crappy amplifier in terms of distortion. Make the the input bigger and you will see clipping -- BIG TIME.Is this difference related to the transistor model?
Cheers
1) my bad: the 711k schematic wasn't meant to be uploaded. I wanted to share the image schematic.Why do you have two different schematics? One has the base bias resistor values both at 711k which is way too high.
Why is your input signal level so low at only 1mV peak? A microphone averages 7mV and has peaks to 20mV or more.
Why is the transistor biased so that it is almost cutoff?
Why is your timebase so wide that it is showing only very narrow waveforms?
Nice rule of thumb, thanks.But to get "low THD" you need to pick RE >> re.
re = Vt/Ie = 26mV/Ie
yeah I can see that from the values in the simulator... but why does it happen? Do I have to see the current mirror as its ouput equivalent resistor? Doesn't that equivalent ouput resistor value decrease when the output current increases? I'm confused.A decreased resistance causes more current in Q3 which causes more current in Q4 which raises the measured voltage.
by Jake Hertz
by Aaron Carman
by Jake Hertz
by Aaron Carman