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Hi,
I am struggling with my project. I am building a 4 X1 CMOS SRAM.
I have some issues about the decoder.
The teacher warned us that when we select the row line , it might be possible to have two rows ( by the decoder) to be at "1" at the same time. This will cause to disturb the memory cell. I dont know how to solve this issue.
Also my design does not seem to hold the value in the memory. I need some help for it too.
We are not using the sense amplifier.
Please can i have some help for the 2 issues I am concern with?
thank you
B
N.B: the SRAM cell are the usual ones . I used blocks to represent them .
I am struggling with my project. I am building a 4 X1 CMOS SRAM.
I have some issues about the decoder.
The teacher warned us that when we select the row line , it might be possible to have two rows ( by the decoder) to be at "1" at the same time. This will cause to disturb the memory cell. I dont know how to solve this issue.
Also my design does not seem to hold the value in the memory. I need some help for it too.
We are not using the sense amplifier.
Please can i have some help for the 2 issues I am concern with?
thank you
B
N.B: the SRAM cell are the usual ones . I used blocks to represent them .
