# Class AB Amplifier - Output Waveform Looks Strange

#### elec_eng_55

Joined May 13, 2018
214
Hello:

Why does the output wave start at 90mV?
The TIP31C and TIP32C have a DC current gain = 25 (BF=25) in LTSpice sim.

Thanks,

David

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#### Ylli

Joined Nov 13, 2015
978
Phase shift through the output cap. Change C2 to 1000 uF.

#### elec_eng_55

Joined May 13, 2018
214
Phase shift through the output cap. Change C2 to 1000 uF.
Thanks Ylli.

When I compute the value of the output coupling capacitor
using C = 1 / 2 * π * f * RL = 1 / 2 * 3.14 * 1000 Hz * 8Ω = 19.90uF.

Thanks,

David

#### Ylli

Joined Nov 13, 2015
978
That would set the reactance of the cap equal to the load. You want the capacitor's reactance to be << than the output load.

#### elec_eng_55

Joined May 13, 2018
214
That would set the reactance of the cap equal to the load. You want the capacitor's reactance to be << than the output load.
OK

So how would you compute the required cap value?

#### Jony130

Joined Feb 17, 2009
5,183
100μF and load resistane gives Fc ≈ 200Hz

And the phase shift at 1kHz will be around φ = arc cot(1kHz/200Hz) = 11°.

That phase angle will give as a time shift Δt, for the period of F = 1kHz---> T = 1ms
Δt = (11°/360°)*1ms = 30.5μs

And yor input signal slew rate is 500mV*1kHz *2*pi = 3.142mV/μs. Hence after 30.5μs, we have around 96mV.

And this is why yor output is starting at 90mV. And this has nothing to do with the dc-offset or distortions. This is just how a simulation shows the phase shift. So, not need to worry.

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#### elec_eng_55

Joined May 13, 2018
214
100μF and load resistane gives Fc ≈ 200Hz

And the phase shift at 1kHz will be around φ = acr cot(1kHz/200Hz) = 11°.

That phase angle will give as a time shift Δt, for the period of F = 1kHz---> T = 1ms
Δt = (11°/360°)*1ms = 30.5μs

And yor input signal slew rate is 500mV*1kHz *2*pi = 3.142mV/μs. Hence after 30.5μs, we have around 96mV.

And this is why yor output is starting at 90mV. And this has nothing to do with the dc-offset or distortions. This is just how a simulation shows the phase shift. So, not need to worry.
Thanks Jony.

So C = 1 / 2 * π * f * RL = 1 / 2 * 3.14 * 1000 Hz * 8Ω = 19.90uF. is correct?

I also noticed that the positive peak is 430mV and the negative peak is 442mV,
is that normal?

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#### Jony130

Joined Feb 17, 2009
5,183
So C = 1 / 2 * π * f * RL = 1 / 2 * 3.14 * 1000 Hz * 8Ω = 19.90uF. is correct?
What do you mean by "correct"? Yor math is corrent.
Is this value is correct or not it will depend for example, the application the technical requirement or capacitor size or cost.
Also you shoud keep in mind that at this frequency (1000 Hz) the phase shift is equal to 45° degrees and RC circuit gain is 0.707.

#### Jony130

Joined Feb 17, 2009
5,183
I also noticed that the positive peak is 430mV and the negative peak is 442mV,
is that normal?
Yes, because of the fact that the positive gain (NPN) is different than the negative gain (PNP).

#### elec_eng_55

Joined May 13, 2018
214
What do you mean by "correct"? Yor math is corrent.
Is this value is correct or not it will depend for example, the application the technical requirement or capacitor size or cost.
Also you shoud keep in mind that at this frequency (1000 Hz) the phase shift is equal to 45° degrees and RC circuit gain is 0.707.

Yes, because of the fact that the positive gain (NPN) is different than the negative gain (PNP).

Is the positive gain always greater than the negative gain?

Going one step farther, to add a Class A CE driver to a Class AB Amplifier.
This is not my own design. After running a sim, I can see that it has design
flaws, but I have no idea what they are since I don't really understand this
circuit configuration. I do understand that the CE stage provides both voltage amplification and bias current for the output stage but beyond that I am lost.

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#### Jony130

Joined Feb 17, 2009
5,183
Is the positive gain always greater than the negative gain?
No, not always. In your circuit, the negative gain is larger.

I don't really understand this
circuit configuration. I do understand that the CE stage provides both voltage amplification and bias current for the output stage but beyond that I am lost.
Yes exactly Q1 was added to drive the output stage (via Ic1 current ) but you also want gain from this CE amplifer too.
Can you be more specific what you do not understand in this circuit?

http://hackaweek.com/hacks/?p=332
http://sound.whsites.net/amp_design.htm

#### elec_eng_55

Joined May 13, 2018
214
No, not always. In your circuit, the negative gain is larger.

Yes exactly Q1 was added to drive the output stage (via Ic1 current ) but you also want gain from this CE amplifer too.
Can you be more specific what you do not understand in this circuit?

http://hackaweek.com/hacks/?p=332
http://sound.whsites.net/amp_design.htm

I am sorry, the more questions I ask, the more questions I have.
Why is my negative gain higher? What can I do to equalize the
positive and negative gain?

I know that the circuit with the driver is not working right. But I don't
know why.

I will also visit those sites that you suggested.

David

#### Audioguru

Joined Dec 20, 2007
11,249
Usually the output transistors have a low value (0.33 ohms0 series emitter resistor. the entire amplifier usually has negative feedback. Both reduce distortion.

#### Bordodynov

Joined May 20, 2015
2,662
See

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#### Jony130

Joined Feb 17, 2009
5,183
Why is my negative gain higher? What can I do to equalize the
positive and negative gain?
The gain is different because the output transistors are not perfectly matched. Hence, the NPN voltage follower will have a slightly different gain than the PNP one.

And the small signal gain of a voltage follower is Av = RL/(re + RL)

#### Audioguru

Joined Dec 20, 2007
11,249
Instead of the emitter resistor RB4 that causes the Vout to be clipped on its bottom, the circuit should have AC and DC negative feedback.

#### elec_eng_55

Joined May 13, 2018
214
Thank you everyone!

#### elec_eng_55

Joined May 13, 2018
214
Should the dc voltage between the Q7 and Q8 emitters not be 6 volts?
And how do I achieve that?

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#### Jony130

Joined Feb 17, 2009
5,183

#### elec_eng_55

Joined May 13, 2018
214
You are asking about what? The voltage at Q7 and Q8 emitters should be close to 1/2Vcc = +6V for 12V supply.

The Q10, Q7 and Q9,Q8 are nothing more than the voltage followers. And thank to this complementary connection Vin = Vout (no DC-offset)

http://www2.engr.arizona.edu/~brew/ece304spr07/Pdf/Class AB with VF.pdf

The voltage at Q7 and Q8 emitters should be close to 1/2Vcc = +6V for 12V supply but it is
actually 7.26 volts in the sim. The output is out of wack as well. Its hard for me to
understand this circuit when it doesn't work right.

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