clarify semiconductor posts?

Thread Starter

Dr Jefyll

Joined Sep 8, 2014
5
Hi! I just discovered AAC thanks to a post on Hacker News. Great stuff! I've only begun exploring, but here's a suggestion.

At the bottom of the Thyristors page it says, "A positive pulse applied to the gate of an SCR triggers it into conduction." Wouldn't it be better to specify, "positive with respect to the cathode"? Experienced people easily assume this, but assumptions aren't appropriate in an educational setting.

More worrisome, the MOSFET page begins with two diagrams showing how a depletion region is established by making the gate positive with respect to the substrate. But then we see two diagrams with no connection to the substrate at all!

In discussions elsewhere I've often seen the MOSFET described as a symmetrical device, and IMO this theoretical point deserves an unhurried explanation so it can be firmly established and understood. Heck, I'm not sure I fully understand it myself! :confused: I realize (as stated later) that, in discrete MOSFET's, the substrate is connected to the source, but really MOSFET's are four terminal devices.

For once I'd like to see them discussed as such! (with due respect to the efforts of folks here and elsewhere). The assumption that substrate and source are connected should be carefully avoided until after the basics are established.

Can the page be improved so it clearly explains the 4-terminal theory first, and only deals with the 3-terminal assumption after? I've seen a bunch of internet references that failed to do so -- and, sadly, a university-level textbook, too.o_O

cheers, and thanks
Jeff
 

MrChips

Joined Oct 2, 2009
30,808
Welcome to AAC, Jeff. We hope you will find the site and forums interesting and valuable enough for you to spend an extended length of time with us.

Your input and feedback is very valuable and will allow our authors to improve on the on-line tutorials.

Here is an article on MOSFETs that was recently brought to our attention that you may find interesting:

http://www.aldinc.com/pdf/IntroDepletionModeMOSFET.pdf

I don't know how this addresses some of the issues you have raised.
 

Thread Starter

Dr Jefyll

Joined Sep 8, 2014
5
Thanks for posting. I wrote to the article's author, Linden Harrison, but apparently the included email address is no longer valid. I'll be grateful if anyone can supply me with current contact info for him.

By way of background, my interest in the "four-terminal-ness" of MOSFETs has a lot to do with devices like the CD4007, a 14-pin DIP which includes four FETs whose source is not by default connected to the substrate or well. The CD4007 can be used to implement a transmission gate or a voltage-controlled resistor. More perplexing is the 74CB3T3384, a FET bus switch IC capable of shifting logic levels between circuits operating at different supply voltages. (see attached files)

These examples appear to use the source and drain interchangably, which illustrates the FET's symmetrical nature. I surmise that the channel resistance is controlled both by gate-to-source voltage and by gate-to-drain voltage. The AAC MOSFET tutorial offers no insight on this, however -- hence my post here in the Feedback & Suggestions section.

-- Jeff
 

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studiot

Joined Nov 9, 2007
4,998
Can I draw your attention to the following paragraph in the E-Book

The MOSFET described above in Figure above is known as an enhancement mode MOSFET. The non-conducting, off, channel is turned on by enhancing the channel below the gate by application of a bias. This is the most common kind of device. The other kind of MOSFET will not be described here. See the Insulated-gate field-effect transistor chapter for the depletion mode device.
The pdf linked is specifically about depletion modes mosfets, which are specifically excluded in the Ebook text referred.

What is the exact advantage of starting with a four terminal model please Jeff?
 

Thread Starter

Dr Jefyll

Joined Sep 8, 2014
5
Thanks for the reply, studiot. Regarding enhancement versus depletion mode devices, I can assure you there's been no misunderstanding. I enquired about the one and Mr Chips obliged me with an article about the other. This I found helpful despite the alternative context.

As for the four-terminal model, I've already mentioned that the cd4007 (applied as a transmission gate) and the 74CB3T3384 appear to use the source and drain interchangably. Because my goal is to expand my understanding, I'd like to confirm that source and drain are exactly the same thing -- a pair of "uni-sex" terminals which can pass current in either direction. Amazing! But tying source to substrate narrows the possibilities substantially... and discussions with this context suffer accordingly.

I'm grateful to the e-book authors, but I would be even further impressed if they had more to say about the sameness of the source and drain. For example, is it true that the channel resistance is controlled both by gate-to-source voltage and by gate-to-drain voltage? (I gather that the substrate is pretty much a NOP, and can be ignored as long as it's biased so as to prevent conduction of the parasitic diodes which are present.)

I know very well how hard it is to write concise, comprehensive doc! But if the AAC e-book can make this subject clear, it'll distinguish itself from every other treatment of the subject I've seen.

cheers,
Jeff
 
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