For educational purposes, I would like to create digital logic circuits (inverter, NAND, NOR, etc) using discrete n-type and p-type logic level MOSFET in a CMOS configuration. Reading from this website and others, there's mention that a Gate Resistor is needed to protect the MOSFET gate from sudden in-rush of current to charge the gate capacitance and, also, to damper ringing on the Gate.
I plan on using the high-level schematics found below to build this circuits using +5v Vdd. What parameters on the datasheet should I use to calculate the Gate resistor? Also, where can I find the formula for this calculation?
https://www.allaboutcircuits.com/textbook/digital/chpt-3/cmos-gate-circuitry/
Thanks!
I plan on using the high-level schematics found below to build this circuits using +5v Vdd. What parameters on the datasheet should I use to calculate the Gate resistor? Also, where can I find the formula for this calculation?
https://www.allaboutcircuits.com/textbook/digital/chpt-3/cmos-gate-circuitry/
Thanks!