Binary Counter With Parallel Load

Thread Starter

Chuchigo Pokach Pikasaki

Joined Sep 23, 2015
5
Show how the 74161 IC, together with a two‐input NAND gate, can be made to operate
as a synchronous BCD counter that counts from 0000 to 1001. Do not use the clear
input. Use the NAND gate to detect the count of 1001, which then causes all 0’s to be
loaded into the counter.


Please guide me. :(
 

Thread Starter

Chuchigo Pokach Pikasaki

Joined Sep 23, 2015
5
look at the datasheet.

You will see a time ladder diagram of the signals.

Build your circuit.
Time ladder is new to me sir, I don't know how to do it with that. I'm just building my circuits by knowing their present state and next state and knowing their equivalent excitation table.
 

Thread Starter

Chuchigo Pokach Pikasaki

Joined Sep 23, 2015
5
Do you understand page 5 and page 11?

Have you searched for 74161 counter schematics?

The 74161 is a four bit counter in one chip.
What are those pages sir?. Yes I know it is a 4-bit counter in one chip but how do i design it to be a binary BCD counter with a NAND gate?. That is my query sir. Please guide me. :(
 

JoeJester

Joined Apr 26, 2005
4,077
Let me reword your instructions.

Use a 74161 to design a modulo 10 counter.
You are not allowed to use the Clear function in the 74161; you must use the load function to preset the counter to 0000.
 
Last edited:

RBR1317

Joined Nov 13, 2010
490
The 74161 is a complex presettable counter circuit. You have been assigned the task of making it behave in a particular fashion. There is no design procedure to accomplish this. Your only chance of success is to become intimately familiar with the functioning of the 74161 circuit and how each of the inputs affects its operation. Only then, with a spark of insight, will you see how to make it behave as desired.
 

WBahn

Joined Mar 31, 2012
24,692
Show how the 74161 IC, together with a two‐input NAND gate, can be made to operate
as a synchronous BCD counter that counts from 0000 to 1001. Do not use the clear
input. Use the NAND gate to detect the count of 1001, which then causes all 0’s to be
loaded into the counter.
The key is that last sentence.

1) How would you load all 0's into the counter?

2) How would you use a two-input NAND gate to detect the count of 1011?

3) How would you use the output of a NAND gate to load all 0's into the counter?
 

Papabravo

Joined Feb 24, 2006
12,389
Hint:
Make an ordered list of the counter states from 0000 to 1111. The list will have sixteen entries. What is the common property of the states from 1001 to 1111 ? What is the common property of the states from 0000 to 1000?

NOTE: this is a visual pattern matching exercise. Don't think about it too hard, and if you don't see it, walk away and come back to it. Keep trying until you see the pattern.

Once you solve it, ask yourself how to make a modulo 3 counter that goes {1101,1110,1111}* using any available means.

How about a modulo 5 counter that goes {0101,0110,0111,1000,1001}* using any available machines.

{...,...,...}* -- is a regular expression of states that is repeated zero or more times.
 
Last edited:

WBahn

Joined Mar 31, 2012
24,692
Hint:
Make an ordered list of the counter states from 0000 to 1111. The list will have sixteen entries. What is the common property of the states from 1001 to 1111 ? What is the common property of the states from 0000 to 1000?

NOTE: this is a visual pattern matching exercise. Don't think about it too hard, and if you don't see it, walk away and come back to it. Keep trying until you see the pattern.

Once you solve it, ask yourself how to make a modulo 3 counter that goes {1101,1110,1111}* using any available means.

How about a modulo 5 counter that goes {0101,0110,0111,1000,1001}* using any available machines.

{...,...,...}* -- is a regular expression of states that is repeated zero or more times.
I don't know what common property you are looking for in the states from 1001 to 1111. What property does 1001 and 1110 have in common that 1001 and 1000 don't?

This counter relies on 1001 having a property that 0000 through 1000 does NOT have. Whether 1010 through 1111 do or don't share that property is irrelevant because those are intended to be states that are never reached.
 
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