View attachment 124248

Does this lower the input impedance or is the impedance of the FET maintained?

 

You are driving the 20k resistor.

I used this in a class B high current low distortion amplifier amplifier in a commercial product. Its performance met every expectation.

 

Here is the voltage follower configured all the way to do what I was putting it together for, an audio amplifier-final stage for headphones.

The biggest change is decreasing resistance of R3 from 1 k Ohm to 68 Ohm. Graphing the DC and AC load lines, it quickly becomes apparent that resistance of R3 must be comparable to load resistance. Fortunately quiescent Vgs only increases by 0.5V relative to the greatly decreased resistance of R3.

Resistance of R1 and R2 are both increased ten fold so that capacitance of C1 can be as small as possible for full frequency range operation.

The peak input voltage has to exceed 2 volts to cause the amp to clip. Less than that and there is no clipping, so this should provide enough power gain to make the phone's output loud.

For anyone interested,
Pete

 

You could drop that output cap to the range of 33 uf to 68 uf because your headphones will not produce very low notes. Right now it is designed for about 12 Hz. Not necessary.

Other than that, you seem to have figured it out.

 

You could drop that output cap to the range of 33 uf to 68 uf because your headphones will not produce very low notes. Right now it is designed for about 12 Hz. Not necessary.

Other than that, you seem to have figured it out.

Yes that value of C2 is just one that I have on-hand that is larger than what would be minimally required, without the physical size of the cap being too big.

Most of the current headphones do reproduce as low as about 20 Hz, or at least that is what the manufacturers claim. One thing about headphones, though, is that even if bass frequency response is good, it lacks something compared to reproduction with a loudspeaker system with the same bass frequency response.

 

Here is the voltage follower configured all the way to do what I was putting it together for, an audio amplifier-final stage for headphones.

The biggest change is decreasing resistance of R3 from 1 k Ohm to 68 Ohm. Graphing the DC and AC load lines, it quickly becomes apparent that resistance of R3 must be comparable to load resistance. Fortunately quiescent Vgs only increases by 0.5V relative to the greatly decreased resistance of R3.

Resistance of R1 and R2 are both increased ten fold so that capacitance of C1 can be as small as possible for full frequency range operation.

The peak input voltage has to exceed 2 volts to cause the amp to clip. Less than that and there is no clipping, so this should provide enough power gain to make the phone's output loud.

For anyone interested,
Pete

View attachment 124342

See

 

One thing about headphones, though, is that even if bass frequency response is good, it lacks something compared to reproduction with a loudspeaker system with the same bass frequency response.

That's because with a good subwoofer you don't just hear the low frequencies, you feel them.

 

Borodynov,

Thank you for the simulation.

In my bench (actual) testing today, I found that Vpk of the voltage drop across the load can be as much as 2.7V without clipping. That is only slightly less than what your simulation shows. Previously I thought that I had seen slightly more than 2V as the threshold.

 

That's because with a good subwoofer you don't just hear the low frequencies, you feel them.

Headphones that only rest on the ears (so-called open air) plus a loudspeaker-subwoofer equals music listening nirvana?

 

1. With the maximum amplitude level of AC input signal present not causing the amplifier to clip, how much power must the FET dissipate? Is it the same, slightly more or much greater than at quiescence?

For my amplifier in the schematic of post #23 (this thread) with no input signal,

P= Vdsq*Vr3/ R3 = 6V*9V/68 Ohm = 794 mW

The FET in that circuit is rated as handling up to 1W.

2. In an integrated audio amplifier where voltage amplification is class B, is it fruitless to make the final stage, a voltage follower, a class A amplifier? The voltage follower is not going to negate cross-over distortion of the previous voltage amplification, so is there any benefit to making it class A?

 

I used this in a class B high current low distortion amplifier amplifier in a commercial product. Its performance met every expectation.

That's brilliant!
Wish I had thought of it!

 

The voltage follower is not going to negate cross-over distortion of the previous voltage amplification

That is the important point.

how much power must the FET dissipate?

A class A amplifier has no difference in power dissipation when driving a signal.

ps, I calculate 800 mw. It is not nice to push a transistor that close to its power limit. If it's uncomfortable to hold with your fingers, you should probably attach a heat sink to give it a long survival time.

 

That is the important point.

A class A amplifier has no difference in power dissipation when driving a signal.

ps, I calculate 800 mw. It is not nice to push a transistor that close to its power limit. If it's uncomfortable to hold with your fingers, you should probably attach a heat sink to give it a long survival time.

Thank you for the responses. After running the amplifier continuously for 15 minutes, the FET was only warm to touch. In the absolute max. ratings, power dissipation is given as 1.3W. In the description, it says that up to 1W can be dissipated by the connection of the drain pins to the circuit board. Attaching some sort of heat sink to it would be difficult as it is a 4 pin package about one-half the size of a 8 pin IC.

 

power dissipation is given as 1.3W

I thought you said 1 watt and you are running it at 80% of a watt. That's too close. Now you say it's 1.3 watts and you're running it at 62% of the limit. That's safer.

 

I thought you said 1 watt and you are running it at 80% of a watt. That's too close. Now you say it's 1.3 watts and you're running it at 62% of the limit. That's safer.

In my opinion, the spec sheet is a little contradictory. Absolute max. power is 1.3W, but in the description, where the heat sink is the soldered connection of the drain pins to a circuit board, it states dissipation is up to 1 watt.

Operating the circuit assembled on socket board for 15 minutes, at the end it was only warm and not uncomfortable at all keeping my finger on it. Probably making the copper that the drain pins are soldered to a bit large would be adequate.

Look on the first page of the spec. sheets the link to which is below.
http://www.vishay.com/docs/91128/sihfd120.pdf
Thanks for the guidance,
Pete

 

When in doubt, run the math on the thermodynamics. 0.8 W /0.0083 W/C = 96.4 C above ambient.
For Ta = 25C Tj = 121.4C
Temp limit = 175 C
That's how you do it.

ps, That double pin on the drain end is built for a big copper island to radiate heat.
"The dual drain serves as a thermal link to the mounting surface for power dissipation levels up to 1 W."

pps, Practically anything metal can be a heat sink. Some chips are running around with a penny or a quarter glued on them.

 

Well, two things about the amplifier of post #23 (this thread).

First of all, the FET of the circuit assembled on socket board (aka solder-less breadboard) without any heat sink really does get quite hot. What mislead me to make a wrong judgement not in line with calculated dissipation of about 0.8W was to check the temperature (with my finger) after turning the power off. Since this FET is in a very small package, within a few seconds of disconnecting the power supply, it very rapidly cools.

So but I did test for overheating with the circuit soldered to strip board and including a heat sink. See the attached photo. The heat sink is two of 18 gauge solid copper wire, about two inches long each and formed into a U, connecting the drain of the FET to power supply +15V. The FET still gets quite warm, but I can keep my finger on it without causing discomfort.

The second weird thing is that if the negative power supply voltage is NOT earth ground, the FET outputs a 60 Hz wave about 30V peak to peak. This is on the screen of my cathode ray oscilloscope. This signal is not audible at the output of the amp. Making ground of the circuit earth ground cures it.
But, still somewhat inconvenient, and very strange.

The photo of the circuit is without the capacitors.

Is there a different easier way than earth ground to stop the oscillation? A resistor in series with the gate does not stop the oscillation. By the way the power supply for the circuit was linear regulated (LM317).

-Pete

 

Is the oscillation synchronized with the power line?

 

Headphones that only rest on the ears (so-called open air) plus a loudspeaker-subwoofer equals music listening nirvana?

For me, not quite, since headphones make it sound like the music is being played in your head, not out in front of you.
So I prefer a good set of bookshelf monitor speakers (HSU HB-1's are my favorite) on either side of my monitor, along with a subwoofer, for listening while on the computer.
Gives more airy and realistic stereo imaging.
Of course, that's a more expensive option.

 

Is the oscillation synchronized with the power line?

That I don't know, but if so, then what would that mean? If whether or not that is true would offer a solution other than earth ground, I'd give it a try. Generally I would be adverse to connecting a channel input of my scope to the power line.