I am working on a design where I need bidirectional voltage translation/shifting between 12V & 3V3, 3V3 is my MCU and 12V is a separate device. These separate devices utilize 2 wires which some devices treat as TX/RX and others treat as DATA/CLK with many of these devices using these lines to snd/rcv at from 4800bps up to 19200bps.

My current design and our v1 prototype boards have a voltage translator, the TI TXS0108E. This is being used successfully to translate between 3V3 on my MCU side and 1V8 on the other side. I had hoped I would find an IC like the TXS0108E that would permit 3V3/12V but I've not found one as of yet so I have been exploring how to do this bi-directionally.

I came across the circuit in the image shown below using an N channel MOSFET. This seemed too simple to be correct but I ordered a handful of the BS170's to test with. At present i've tested this with 3V3 on both the high & low side ONLY because the device I am testing with is powered via a USB and it has a 3V3 out pin AND I cannot easily put 12V on the high side with this device because of the different power planes. I have one of these circuits on my MCU TX with the LOW_SIDE_LOGIC_INPUT connected at my MCU TX and I have another one of these circuit on my MCU RX with the LOW_SIDE_LOGIC_INPUT connected at my MCU RX. I have the HIGH_SIDE_LOGIC_OUTPUT for both of these circuits connected to each other so that, essentially, i have the TX & RX in a loopback. I have it this way for now just so I can test sending & receiving. Unfortunately with this setup I read nothing but 1's which I thought might be the case because I don't see how the LOW_SIDE_LOGIC_INPUT side ever gets pulled to ground.



Looking at the architecture of the TXS0108E I see a Functional Block Diagram in Figure 9 and an Architecture of a TXS0108E cell in Figure 10 of the datasheet both of which are below or attached. If I cannot find a bidirectional 12V/3V3 level shifter in an IC it looks like it could be built using a pair of N channel and a pair of P channel MOSFETS on each line essentially following the TXS0108E architecture? Given the lower speed I shouldn't need one shot accelerators (OS1 - OS4) and I think I understand Rpua & Rpub as the same as R1 & R2 in above diagram but I don't understand R1, R2, the gate bypass or Translators T1 & T2.

All input & guidance is much appreciated.

 

Unfortunately with this setup I read nothing but 1's which I thought might be the case because I don't see how the LOW_SIDE_LOGIC_INPUT side ever gets pulled to ground.

The low side will be pulled low when the high side is pulled low.
See the link below for more explanation.
http://cdn.sparkfun.com/tutorialimages/BD-LogicLevelConverter/an97055.pdf

 

From that app note AN97055 (note that the higher V is 5V)...


State 1. No device is pulling down the bus line and the bus line of the “Lower voltage” section is pulled up by its pull-up resistors Rp to 3.3 V. The gate and the source of the MOS-FET are both at 3.3 V, so its VGS is below the threshold voltage and the MOS-FET is not conducting. This allows that the bus line at the “Higher voltage” section is pulled up by its pull-up resistor Rp to 5V. So the bus lines of both sections are HIGH, but at a different voltage level.

State 2. A 3.3 V device pulls down the bus line to a LOW level. The source of the MOS-FET becomes also LOW, while the gate stay at 3.3 V. The VGS rises above the threshold and the MOS-FET becomes conducting. Now the bus line of the “Higher voltage” section is also pulled down to a LOW level by the 3.3V device via the conducting MOS-FET. So the bus lines of both sections become LOW at the same voltage level.

State 3. A 5 V device pulls down the bus line to a LOW level. Via the drain-substrate diode of the MOS-FET the “Lower voltage” section is in first instance pulled down until VGS passes the threshold and the MOS-FET becomes conducting. Now the bus line of the “Lower voltage” section is further pulled down to a LOW level by the 5 V device via the conducting MOS-FET. So the bus lines of both sections become LOW at the same voltage level.

 

Much appreciated, i'll give this a read and examine the circuits I have in my loopback setup to make sure they are correct. Perhaps it isn't working in testing because I am using the same 3V3 as the PU on both the source & drain sides of both MOSFETS so I'll setup a different system that i can power off my bench power supply and use the 12V & 3V3 rails coming off of that. Are there any reasons why I wouldn't be able to put the TX and RX of a serial port each on the "low input" side of their own MOSFET circuit with the "high output" sides of each MOSFET circuit cross connected? I *should* just be able to open a serial terminal server (minicom) and send/receive i would think.

 

Note that the signals should be open collector/drain for this circuit to work. You can drive the input low but not high - it should only go high when pulled up by a resistor.

 

thank you, I think what i am working with are push/pull but i'll need to research it.