AVR micro controllers

Discussion in 'Embedded Systems and Microcontrollers' started by srikar sana, Sep 13, 2016.

  1. srikar sana

    Thread Starter New Member

    Feb 3, 2016
    i have some doubts regarding the avr micro controller
    i was reading the book mazidi and i got some doubts
    1. there was a question like this
    STS ORC0 ,R17
    why is it wrong is it because STS cannot understand what OCR0 is ? and only IN and OUT commands only understand what that is ?
    becasue i read that we can even replace the address with the name if there are ..... in the instructions

    2. why cant we write an immediate data to SRAM in the ATMEGA128 is it because the AVR architecture does not support the immediate addressing mode to data space ? or why
    3. are the registers present in the internal SRAM or are they present separately because when i was reading the data sheet it was told that in normal mode for atmetga128 there are 32 registers and 64 i/o ,160 extended io and 4096 SRAM locations and we can connect an external SRAM but the address follows with the internal that means at the external there will be 65536(64k)-4352(4096+32+64+160)=61148 locations it seems....so i got this doubt
    i am a beginner and i am a slow learned so pls explain in detail everything..........

    4. why does PC increments by +2 everytime it goes for the next instruction because the memory in the flash is 64k*16 so with just one increment it can get the entire next instruction.........
    i am asking this because when my sir told me about RJMP label he told that the following operation is made on pc i.e,. PC=PC+k+1
    when we asked about the +1 he started his explanation with this sentence "everytime pc points to next instruction it increments by 2 i.e,., if it is in 1000 address then it will point to 1002 because each instruction is 16bits so ................" and so on but our flash memory contains 16 bit feild in every location so that we can access every instruction at a single time....

    i think now you get my doubt why pc=pc+k+1 in rjmp etc instructions ?
    5. last one what is the address of SREG ? how to copy the contents of the SREG into the other register say R19.
    Last edited: Sep 13, 2016
  2. shteii01

    AAC Fanatic!

    Feb 19, 2010