Maybe use a CD40174B HEX-D to reduce the DFF chip count in post #7?

Nope.

While the 4017 can appear to function as a specialized shift register, and is in fact based on one internally, its outputs are mutually exclusive. The consequence of this is that the XNOR gate, which is a key element of most LFSR circuits, will not function correctly.

With the 4017, only one output can be high at any time, for a total of 10 possible codes in a perfectly predictable sequence. With a true shift register, all binary output combinations (64 in the case of post #7) are possible *and required* for correct operation.

ak

 

Any reason the 6-bit shifter couldn't be replaced by a single-chip 8-bit SIPO?

None I can think of.

For example, below is the LTspice simulation of the generator using a 74HC164 8-bit parallel out shift-register.
Again U8 and U9 act as a digital one-shot so the output is never low for more than one clock cycle.

 

That looks like pulse density modulating with an extra fixed off time,

https://en.wikipedia.org/wiki/Pulse-density_modulation

 

Nope.

While the 4017 can appear to function as a specialized shift register, and is in fact based on one internally, its outputs are mutually exclusive. The consequence of this is that the XNOR gate, which is a key element of most LFSR circuits, will not function correctly.

With the 4017, only one output can be high at any time, for a total of 10 possible codes in a perfectly predictable sequence. With a true shift register, all binary output combinations (64 in the case of post #7) are possible *and required* for correct operation.

ak

what 4017?

 

what 4017?

Whoa - 4017***4*** -- oops. My bad.

ak