For the above question I got the answers:

a. SUM = 0110 | C = 1001

b. SUM = 0100 | C = 1010

Are these answers correct and how is the overflow calculated?

 

No, the sum(difference) for b.) is wrong
Carry is only a single bit
Overflow is the bit labeled V, in the lower left of the diagram

 

You should be able to arrive at the answers two ways. First, by carrying out the logic in the design. But you should also be able to determine what the logic of the design SHOULD produce by understanding what the design is supposed to implement.

In this case, you have a circuit that is supposed to add or subtract, depending on the mode, two four-bit two's complement numbers.

So the two bit patterns for each scenario represent two values, what are those value (in base ten)? What is the true result in base ten? Is that result representable as a four-bit two's complement number? If not, then the carry bit should be set, otherwise it should be clear. Finally, what is the bit representation of that value that should appear at the SUM output?