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I am designing a stand alone board with AD5941.First time I am doing the layout of a board like this.The LDO used for powering the ADC is ADM7155.The scheamtic diagram of power section is given below.
My stack up is SIGNAL-GND-POWER-SIGNAL.The complete view of the power plane and power input entry is given below.
Let me give a detailed explanation of the each sections
INPUT POWER ENTRY
The power coming from input is filtered and it's output is connected to a polygon(Top layer RED COLOR) from that it is connected to another polygon in layer-3(BROWN COLOR) using multiple vias.
INPUT TO LDOS:
FROM Layer 3 polygon(LDO_IN) multiple vias are used to connect tho both LDO's
FOR U4:
FOR U5:
AVDD PLANE GENERATION:
For AVDD output from R1 is connected to layer 3 using multiple vias.As shown below.
Power entry to DVDD Plane:
U5 output from R7 is connected to layer 3 DVDD polygon using multiple vias.
May I know my power plane design is correct or not.
Can I go ahead with routing
My stack up is SIGNAL-GND-POWER-SIGNAL.The complete view of the power plane and power input entry is given below.
Let me give a detailed explanation of the each sections
INPUT POWER ENTRY
The power coming from input is filtered and it's output is connected to a polygon(Top layer RED COLOR) from that it is connected to another polygon in layer-3(BROWN COLOR) using multiple vias.
INPUT TO LDOS:
FROM Layer 3 polygon(LDO_IN) multiple vias are used to connect tho both LDO's
FOR U4:
FOR U5:
AVDD PLANE GENERATION:
For AVDD output from R1 is connected to layer 3 using multiple vias.As shown below.
Power entry to DVDD Plane:
U5 output from R7 is connected to layer 3 DVDD polygon using multiple vias.
May I know my power plane design is correct or not.
Can I go ahead with routing
