555 timer V.S. Atmega13 for reliabilty

in terms of long term reliability and robustness, which option is better?

  • 555 timer

    Votes: 1 100.0%
  • atmega13

    Votes: 0 0.0%
  • any other suggestion

    Votes: 0 0.0%

  • Total voters
    1

Thread Starter

haythamhakla

Joined Apr 10, 2017
14
Hi,
I have a very simple application where I need to switch on a motor for a few seconds when there is a trigger. ( Trigger is from an optical sensor )
I have two ways of doing it :
Option 1 : Using a 555 timer in monostable mode
Option 2 : Using a small microcontroller like the atmega13 and write a simple code that turns on an output pin for the required duration when it gets a trigger at an input pin.

Question : in terms of long term reliability and robustness, which option is better? The system will continuously run for 16 hours a day and I need it to be stable and reliable for the long term.
Any feedback would be helpful.
Regards
 

HW-nut

Joined May 12, 2016
97
A bit subjective. The 555 solution is probably stable within ~5%. What are the requirements in terms of testable requirements?

The MPU approach can achieve very good accuracy and stability (~.01%) without trying to hard. MPU’S are inheritly more complex than the 555 and as a result is less reliable. The MPU is also much more flexible.
 

Thread Starter

haythamhakla

Joined Apr 10, 2017
14
In my application, timing is not as important as reliability. If the timing is accurate within 5% that would be more than enough.
What i dont want is the software of the atmega to freeze or the capacitor of the 555 timer getting electrically damaged somehow after a certain number of cycles.
I am not sure which failure of these two is more likely to happen
 

HW-nut

Joined May 12, 2016
97
In many designs, the failure modes are related to robustness of the I/O interfaces. Designing with high margins has a huge effect on reliability. You want the circuit to run cool. Also, I/O should be protected agaist ESD, over-current, etc.

Most failures are ether mechanical or high-power in nature, so for a robust design, these interfaces are critical.
 
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jpanhalt

Joined Jan 18, 2008
11,087
Last edited:

danadak

Joined Mar 10, 2018
4,057
Processor reliability in many applications takes consideration.

Typical methods involve watchdog timer periodic reset, traps for
memory accesses out of range.

Then you have system noise, if trigger noisy then UP might offer better
methods, like debounce, than 555 solution. Or severely BW limit trigger
input on 555 time thru use of capacitor.

Another advantage of processor is brownout handling and making sure
system doe not "open control loop" of motor when marginal supplies occur.

If safety a big issue dual processors checking on each other used in things
like automated drug delivery systems.

Regards, Dana.
 

AnalogKid

Joined Aug 1, 2013
12,126
A 555 contributes approx. 1% to the overall circuit timing accuracy error budget. The majority of the error comes from the external components, and the majority of that error comes from the capacitor. For timing in the seconds range you probably will need an electrolytic capacitor, the (relatively) worst option for both accuracy and reliability. Some of these caps have tolerances like +80%/-20%. This is not a problem for the initial build, because you can adjust the timing resistor to get the period correct. However, electrolytics change more with age and temperature than any other capacitor structure. Plus, they dry out over time. For a few years, no problem. For decades, consider something else.

But, for decades-long reliability you have to consider the flash memory reliability in the uC. Because of this, my choice would be a CD4060 oscillator/divider. It does seconds/minutes/hours-long delays with much smaller capacitors (approx. 1/8000 smaller value) that have vastly superior long term stability and reliability, and there is no memory or programming. My fav part for long timing periods or low oscillator frequencies.

Here is a circuit from another thread that is very close to what you describe. The only part that is not in either an equivalent 555 or uC circuit is the diode that causes the 4060 to stop counting when the output turns off, latching the circuit until the reset button is pressed. R1 and C1 change value for your requirement, and R5 and the LED (should be D2) can be eliminated for such a short period.

ak
Fan-Off-Delay-1.gif
 
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danadak

Joined Mar 10, 2018
4,057
But, for decades-long reliability you have to consider the flash memory reliability in the uC
Good point, but then you have buttons discharging cap currents, whats the reliability
of that ? And then if using electrolytic for timing cap its reliability, however that applies
to UP solution as well.

From Datasheet (flash reliability UP) -
Reliability Qualification results show that the projected data retention failure rate is much less
than 1 PPM over 20 years at 85°C or 100 years at 25°C.
Regards, Dana.
 
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AnalogKid

Joined Aug 1, 2013
12,126
Here is an updated schematic for this application. The timing period calculates to a little over 4 seconds. Q1 can be any p-channel MOSFET appropriately sized for the motor voltage and current. If the circuit is driving a higher power load, such as an AC exhaust fan through a solid state relay, then an output transistor might not be needed depending on the SSR requirements.

Overdue questions:
What is the power supply voltage for the timing circuit?
What are the voltage and current requirements for the motor?
What is the output from the optical sensor? If it is a long pulse, then this circuit needs an additional resistor.

Note that C3 is optional. It creates a power-on reset pulse so the 4060 always starts in the same state, with a full timing cycle. Without it, the motor may or may not run at power-on. It isn't necessary for normal circuit operation, eliminating the switch-discharging-capacitor concern.

C2 is a bit oversized to help with motor transients. Depending on what the load actually is, you might need a suppression diode across the motor. The intrinsic zener diode inside Q1 will protect the transistor, but it transfers the transient current to the power rail. A diode across the motor keeps the transient current off the power rails.

ak
Motor-Timer-1-c.gif
 
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AnalogKid

Joined Aug 1, 2013
12,126
From Datasheet -
Reliability Qualification results show that the projected data retention failure rate is much less than 1 PPM over 20 years at 85°C or 100 years at 25°C.
Regards, Dana.
I figured it was a high number. Lattice CPLD's were rated for 30 years. Still, I like counters.

ak
 

crutschow

Joined Mar 14, 2008
38,503
for decades-long reliability you have to consider the flash memory reliability in the uC
Yes, I've run into that problem.
I had a microprocessor controlled TV lift system in a cabinet and it started acting up (having to push the remote button several times to complete the lift) after about 10 years.
A search revealed info this was a common failure of that system due to its internal ROM developing corrupted bits.
It was a German built device with no one in the US to fix it, so I ended up replacing it with a simple remote control relay module with limit-switch inputs for the up and down limits.
 
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olphart

Joined Sep 22, 2012
125
So long as you use a capacitor with long term stability, the 555 will "never" misbehave...
Think of the rain bird that tips on filling up. It'll behave until bearings go bad.
 

danadak

Joined Mar 10, 2018
4,057
Deep space applications must be handling flash issues, would be curious to know
their methods for non stop computing. And thats in a hi energy ionizing environment.

Regards, Dana.
 

AnalogKid

Joined Aug 1, 2013
12,126
Deep space applications must be handling flash issues, would be curious to know
their methods for non stop computing.
Mandatory single-level cells, way more expensive than commercial SSD's. Probably other things also, but that's the one I'm familiar with in the MIL arena.

ak
 

crutschow

Joined Mar 14, 2008
38,503
One way to minimize long-term degradation of flash memory data would be to have dual memory banks and periodically re-write the data to one memory from the other.
 

AnalogKid

Joined Aug 1, 2013
12,126
So long as you use a capacitor with long term stability, the 555 will "never" misbehave...
True, but for a 10 second period that is difficult. As the timing R increases above 1M the chip becomes much more vulnerable to induced transients. And ceramic or film capacitors above a few uF are not as reliable as their smaller siblings.
 

olphart

Joined Sep 22, 2012
125
Ah, quite so, didn't grasp the long duration.
Given that, I'd push the 555 to ~ .1S then use a counter to get to duration.
Let it count, then disable the 555 at duration.
The 40xx series seems appropriate... <<<)))
 

crutschow

Joined Mar 14, 2008
38,503
Let it count, then disable the 555 at duration.
The 40xx series seems appropriate
No need for the 555 if you are going to add a CD40xx IC.
Just use a variation of the simple CD4060 circuit as AK proposed.
That circuit is likely as simple and reliable as any you could make.
 
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GetDeviceInfo

Joined Jun 7, 2009
2,271
In my application, timing is not as important as reliability. If the timing is accurate within 5% that would be more than enough.
What i dont want is the software of the atmega to freeze or the capacitor of the 555 timer getting electrically damaged somehow after a certain number of cycles.
I am not sure which failure of these two is more likely to happen
I would be more concerned with your power switch, and whatever the motor is driving, in regards to reliability. With a micro, you could sense that the motors work is being accomplished, and maybe try some alternate action if it fails.
 
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