555 timer and 7 segment display

MateoEV

Joined May 26, 2023
22
I think you meant MOD12 -- I suspect you overlooked the required space between first and last name.
Well actually he said he had to show "berat sahin" on the displays so it should be MOD11 if there is no space when the cycle repeats, but you're right, it would make more sense to add another space at the end.

Another approach, which is less flexible but results in considerably fewer gates, is to have the states be the necessary encodings of the characters. If no characters where used twice, this would require one FF per display segment. Since 'a' is used twice, an additional FF can be used to indicate whether it is the first 'a' or the second. Similarly, it can be used to indicate first space or second. For his name, that eighth FF could very nicely serve as indicating first name or last name, which makes turning on the red and blue LEDs trivial.
Yes, the logic design would be kind of hellish with my initial approach, but I wasn't sure if it was possible to create a state machine for this problem since the character 'a' is repeated as you mentioned. Anyways that is probably a much more sensible solution and I hope it helps.
 

WBahn

Joined Mar 31, 2012
32,838
Well actually he said he had to show "berat sahin" on the displays so it should be MOD11 if there is no space when the cycle repeats, but you're right, it would make more sense to add another space at the end.
I don't know why I counted 11 actual letters in his name. Eyes are definitely getting old. I think I was seeing the 'h' as 'ln' due to worsening astigmatism.

Yes, the logic design would be kind of hellish with my initial approach, but I wasn't sure if it was possible to create a state machine for this problem since the character 'a' is repeated as you mentioned. Anyways that is probably a much more sensible solution and I hope it helps.
There's a tradeoff between minimizing gates and minimizing implementation time. If this is only going to be done in simulation, then implementing logic with a lot of structure to it is a lot less time consuming, even if the total gate count goes up significantly. The killer in this domain is designing and implementing "random logic".

With eight state variables, trying to really minimize the next-state logic is likely going to be a nightmare. Then, implementing it is going to be time-consuming and error-prone.

But implementing the logic as a hard-coded look-up table would be pretty straight-forward, both to design and implement (in simulation or in an IC layout), though the gate count will likely be significantly higher, which would make breadboarding it a lot less attractive. It would also be a nice bridge between a gate-level implementation and a ROM-based solution, which is what this really calls for.
 
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