draw the logic diagram of a 4 bit serial adder where the 4 bt operands are fed to a full adder unit through 4 consecutive clock pulse and additional result is accumulated in one of the shift register replacing the original operand.

can anyone tell me the question is asking for what?i am not getting it.i am not asking for solution but can anyone give me a small hint?

 

You are requested to build a circuit that will work in cycles of 8 clock pulses. In the first 4 pulses a 4 bit number will be loaded in a shift register. This number will be added to a stored number and the sum will be calculated. In the last 4 pulses, that sum will be loaded in the same 4-bit shift register.

I would use 3 4-bit shift registers. One to store the operand and one to store the result. These registers will be fitted side-by-side. A full adder will add them and store the result in the 3rd register. You must select the serial input of the first register so that in the first 4 cycles it reads from the input and in the last 4 it reads from the sum (3rd) register.

 

This is an old post so I hope it will do no harm to give a better answer.
The circuit they are asking for is a classic accumulator. It only requires two registers, the accumulator and an input register.
The accumulator's input is connected to the output of the serial adder and the accumulator's output is fed back to one of the adder's inputs.
The input register's output goes to the second input of the adder.
Assuming that there is already a value in both registers, clocking the circuit four times will add the two values together and the result will be found in the accumulator.
This is the fundamental building block on which all digital computers are based and a similar circuit exists in every cpu, albeit a parallell version rather than a serial one. .