I did the pulse multiplier 40 years ago! It did use a CD4017and an "OR" gate to let five pulses thru to a FF to divide by two, so the effective frequency multiplication was 2.5 so I could display RPM from a pickup on a speedometer cable as miles per hour on a frequency counter with a one second time base. I used pulses from an intermediate stage of the time base, a 555 oscillator could serve as well. I don't recall the CMOS OR gate type, but they are probably still available. And yes, the input trigger resets the CD4017.
The secret is the OR function.
But you can also do it by having the trigger set a FF to open a gate for pulses and then the count close the pulse gate. With that scheme you can use any counter and any number of pulses.

 

There is another thread somewhere about adding 3 seconds to a countdown timer with each button press.

This 5 pulse circuit is actually a part of my solution to that countdown timer design problem. For that, I used 74LS192 counters which has a separate up and down clocks. The idea is to use two clocks: (1) a consistent 1Hz for the down clock, and (2) a button-triggered 5 pulse for the up clock. I am utilizing the 555 astable + CD4017 Johnson counter for the 5 pulse operating at around 500Hz -- as it fits my requirements. Using a demux, I can switch to the up counter once the button is pressed, then it reverts back to the down counter after adding 5 seconds. The only issue I find here is that the 5 pulse counter sometimes gives 6 pulses instead of 5. Nonetheless, I am happy with the result of this design. Thank you for your insights.

P.S. If you guys still have some inputs, please give me more knowledge.

 

If the one second time base is derived from a higher frequency crystal oscillator then a higher frequency can be available without using 555 devices.

 

If the one second time base is derived from a higher frequency crystal oscillator then a higher frequency can be available without using 555 devices.

I know this design from a previous clock project using a 32kHz crystal, CD4060, and a flipflop, but only on theory. It trades off an extra IC for clock accuracy. However, I have never made it work on an actual board since I cannot make the oscillator work both on simulation and in a breadboard. Basically, you are saying that I can use the CD4060 divide pins to produce two clocks at 1Hz and a higher frequency, right? My concern with this is the reset, if the button is pressed, it will reset both the 1Hz and 5 pulse clock which can probably cause problems to the system.
[Edit]
I realized that I am only using one clock at a time using the demux, so maybe the reset is not an issue. This could potentially work and save a couple of resistors and capacitors.

 

I cannot make the oscillator work both on simulation and in a breadboard.

Hi cor,
Post the asc file circuit for the sim that will not work.
E

 

Post the asc file circuit for the sim that will not work.

I have no asc file for that design as I have only tested it in Proteus.

 

Hi cor,
OK, please post the circuit.
E

 

 

Is 1nF a bit big for the crystal caps?

 

I know this design from a previous clock project using a 32kHz crystal, CD4060, and a flipflop, but only on theory. It trades off an extra IC for clock accuracy. However, I have never made it work on an actual board since I cannot make the oscillator work both on simulation and in a breadboard. Basically, you are saying that I can use the CD4060 divide pins to produce two clocks at 1Hz and a higher frequency, right? My concern with this is the reset, if the button is pressed, it will reset both the 1Hz and 5 pulse clock which can probably cause problems to the system.
[Edit]
I realized that I am only using one clock at a time using the demux, so maybe the reset is not an issue. This could potentially work and save a couple of resistors and capacitors.

My experience with the CD4060 oscillator is similar, seldom able to get it working at the crystal frequency, at least with the crystals I tried to use, and the values shown in the app notes.
How likely is a button press during a counter reset?

 

View attachment 322833

C1 & C2 need to go to 0V, not to MR, and if this is a 32.768KHz Xtal, they'll be in the region of 15 to 33 pF each. R1 should be 10 to 20M, wirh R2 being 330K. That always works for me!