1. stellar_power

    Laying out Duplicate Passives to Tighten Tolerances

    Hi, I'm currently working on a board design for an EEG pre-amplifier (first draft posted here in case interested). EEG is a very weak floating differential signal, about 20uV p-p and a source impedance of 5k at best. So I am using an instrumentation amplifier, with filters and bias return in...
  2. F

    ESR variation of photoflash capacitors placed in series RLC discharge circuit

    Hi, I plan to design a series RLC discharge circuit as shown: Taking into account component parasitics, the actual circuit resembles the following: where: 'R' = capacitor ESR + load resistance + inductor ESR, 'L' = capacitor ESL + load inductance ≈ load inductance According to online...
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