Hello everyone,
I am designing LPF based differential demodulator(LPF_DDM) to retrieve differentially modulated signals, which are on-chip capacitive isolated [shown]. LPF_DDM includes a differential amplifier, LPF, and Schmitt trigger. I designed a two-stage opamp [specification below], as a...
Dear All,
I’m using Hyperlynx (MentorGraphic) for Signal Integrity test for PCIE GEN 1 Tx Rx & Clk signals. I imported Altium designed layout file to Hyperlynx. This signals (Tx, Rx, Clk) don’t pass S – Parameters when I run Serdes Batch Wizard. But it pass Channel Verification.
1) What are...
Hi,
I am simulating my postgraduate project using Hyperlynx SI tool. I am testing on PCIe traces of my design. I did my design using Altium and I exported to Hyperlynx file to do the simulation. But I cannot change the trace width and spacing of Differential pairs using Hyperlynx SI tool. Is...