I would like to make a toggle flip flop (without clock). I made the following J-K flip flop circuit using CD4001BE and sn74hc08 Logic gates IC's. The circuit works as S-R flip flop but it does not toggle when the input is J=1 and K=1.
I connect the inputs together (J & K) and then I tried to give them a pulse using a push button.
I assume the current state of the flip flop is: The output LED Q is on and The Other LED Q bar is off.
When the button is pushed both output LED's are on. When the button is released the output LED Q is also on and the output Q bar is off. The flip flop just returned to its previous state after bushing the button (Nothing toggles).

Someone told me that I should pay attention to the input and output voltage values for both IC's. and I should connect the floating inputs to either Vcc or GND. He gave me the correct schematic but it also behave like the first one.
Would you help me, please ? I just want to make a circuit when it receive a pulse it toggles its state and then holds the current state and waits for the second pulse.


Thank you very much,

 

Do you think is that a toggle flip flop or a two stable flip flop?
And what do you really want?
From your circuit, I guess that you want a two stable flip flop.

 

I've heard that when I connect the inputs of J-K flip flop, it becomes a toggle flip flop. So I'm trying to do that.
If I am mistaken, please send me the right circuit for a Toggle flip flop or a circuit that perform (execute) the above truth table.

 

A Toggle flip flop is just one input, two inputs is the two stable status as a RS flip flop, If you using CD4013 then you can connecting D, Ck to ground, the PR and R is the set and reset, so it is a two stable filp flop, a toggle flip flop is also a two stable flip flop, it just the different input method..

The CD4013 is a toggle filp flop at here-- 1hz timebase.

 

Two nor gates can be a RS flip flop, and that is the basic two stable flip flop, why you need to do the JK flip flop?

Do you really want a toggle flip flop, that is only needs one switch?

 

You cannot toggle on the JK inputs. You have to keep JK inputs high and toggle using the "Clock" input.

Like this



The datasheet of 7476 JK flip flop is attached...

Allen

 

You are confusing a flip-flop with a bi-stable latch.
A FF has a clock input and toggles only with the clock changes state as determined by the state of its control inputs (either D or JK).
A latch has no clock input and changes state immediately as determined by it set or reset inputs.

 

Do you really want a toggle flip flop, that is only needs one switch?

Yes, I want a toggle "latch" (without clock), that is only needs one switch and that's why I tied (connected) J and K together. I need one input only. Actually, I was confusing a flip-flop with a bi-stable latch as @crutschow said. I also would like to make it using logic gates (if possible) so that I learn how it is made.

@absf has sent the exact circuit that I need but I don't prefer to buy 7476 or sn5476, I would like to make it using logic gates.

 

You can try the circuit here in the AAC worksheet area here on question #12.

I try to simulate using my simulator but it doesn't work. I think you need to get the 2- input NAND and 3-input NAND to try it out on the breadboard to see if it works.

see attached also here

Allen

 

The schematic in post #1 is incomplete. Here is a link to several alternatives:
http://todayscircuits.blogspot.com/2011/06/flip-flops.html#.VfbQ3FIX4fx

Circuit #4 is closest to what I think you intended, but 2, 3, or 4 will do what you want. The basic problem is that a J-K flipflop has a third input, the clock. If you want a single pushbutton to cause the outputs to alternate with each push, and you don't want to use a flipflop IC, then this is what you need. A positive edge on the clock input causes the outputs to toggle.
Section #2 - D FF - connect D input to -Q output
Section #3 - JK FF - connect J and K to logic 1
Section #4 - T FF - connect T to logic 1 (same as #3)

ak

 

Hope this doesn't hijack the tread. As someone learning 'logic', in the first post the TS says he wants to use; "CD4001BE and sn74hc08". Is it wise to mix logic families when doing something like this? In my limited knowledge of this type of thing I've never seen it done before.

 

Hope this doesn't hijack the tread. As someone learning 'logic', in the first post the TS says he wants to use; "CD4001BE and sn74hc08". Is it wise to mix logic families when doing something like this? In my limited knowledge of this type of thing I've never seen it done before.

Don't know if it's wise or not but it can be done if the input and output voltage levels and currents are compatible with each other, at least for static logic circuits.

One possible concern is if the logic signal needs to have a minimum rise/fall time (such as a flip-flop clock). In that case a slow family (such as the CD4000 series) may not work reliably with some of the fast 7400 CMOS families.
Need to check their respective data sheets to determine that.

 

The schematic in post #1 is incomplete. Here is a link to several alternatives:
http://todayscircuits.blogspot.com/2011/06/flip-flops.html#.VfbQ3FIX4fx

Circuit #4 is closest to what I think you intended, but 2, 3, or 4 will do what you want. The basic problem is that a J-K flipflop has a third input, the clock. If you want a single pushbutton to cause the outputs to alternate with each push, and you don't want to use a flipflop IC, then this is what you need. A positive edge on the clock input causes the outputs to toggle.
Section #2 - D FF - connect D input to -Q output
Section #3 - JK FF - connect J and K to logic 1
Section #4 - T FF - connect T to logic 1 (same as #3)

Note that those simple circuits generally have a problem in a toggle configuration due to feedback from the output to the input that usually requires the clock pulse width be less than the circuit propagation delay from output to input.
As noted for the T FF, a master-slave configuration will solve that problem.

 

And then there's this little puppy...


ak