I just spun up Version 2 of previous board design. I have not get added a crystal. I tried programming the chip without the crystal. I fully expected the chip to program but not run since I have it configured for external oscillator. But to my surprise the chip runs. If I have the code configured for external and no crystal in place, how can the code run?


// PIC18F27J13 Configuration Bit Settings

// 'C' source line config statements

// CONFIG1L
#pragma config WDTEN = OFF // Watchdog Timer (Disabled - Controlled by SWDTEN bit)
#pragma config PLLDIV = 1 // 96MHz PLL Prescaler Selection (PLLSEL=0) (No prescale (4 MHz oscillator input drives PLL directly))
#pragma config CFGPLLEN = OFF // PLL Enable Configuration Bit (PLL Disabled)
#pragma config STVREN = ON // Stack Overflow/Underflow Reset (Enabled)
#pragma config XINST = OFF // Extended Instruction Set (Disabled)

// CONFIG1H
#pragma config CP0 = OFF // Code Protect (Program memory is not code-protected)

// CONFIG2L
#pragma config OSC = EC // Oscillator
#pragma config SOSCSEL = HIGH // T1OSC/SOSC Power Selection Bits (High Power T1OSC/SOSC circuit selected)
#pragma config CLKOEC =OFF // EC Clock Out Enable Bit (CLKO output disabled on the RA6 pin)
#pragma config FCMEN = ON // Fail-Safe Clock Monitor (Enabled)
#pragma config IESO = ON // Internal External Oscillator Switch Over Mode (Enabled)

// CONFIG2H
#pragma config WDTPS = 32768 // Watchdog Postscaler (1:32768)

// CONFIG3L
#pragma config DSWDTOSC = INTOSCREF// DSWDT Clock Select (DSWDT uses INTRC)
#pragma config RTCOSC = T1OSCREF// RTCC Clock Select (RTCC uses T1OSC/T1CKI)
#pragma config DSBOREN = OFF // Deep Sleep BOR (Disabled)
#pragma config DSWDTEN = OFF // Deep Sleep Watchdog Timer (Disabled)
#pragma config DSWDTPS = G2 // Deep Sleep Watchdog Postscaler (1:2,147,483,648 (25.7 days))

// CONFIG3H
#pragma config IOL1WAY = ON // IOLOCK One-Way Set Enable bit (The IOLOCK bit (PPSCON<0>) can be set once)
#pragma config ADCSEL = BIT10 // ADC 10 or 12 Bit Select (10 - Bit ADC Enabled)
#pragma config PLLSEL = PLL4X // PLL Selection Bit (Selects 4x PLL)
#pragma config MSSP7B_EN = MSK7 // MSSP address masking (7 Bit address masking mode)

// CONFIG4L
#pragma config WPFP = PAGE_127 // Write/Erase Protect Page Start/End Location (Write Protect Program Flash Page 127)
#pragma config WPCFG = OFF // Write/Erase Protect Configuration Region (Configuration Words page not erase/write-protected)

// CONFIG4H
#pragma config WPDIS = OFF // Write Protect Disable bit (WPFP<6:0>/WPEND region ignored)
#pragma config WPEND = PAGE_WPFP// Write/Erase Protect Region Select bit (valid when WPDIS = 0) (Pages WPFP<6:0> through Configuration Words erase/write protected)

 

1) How do you know it is running?
2) At what frequency is it running?
3) Do you have the crystal input pin grounded?
4) They are spec'd down to DC
5) Is it running in sim and/or still attached to the programmer, or is it completely detached and gone through POR?

I suspect it may be running on some default, noise from your power supply, or some other clock. Knowing how fast it is running (if possible in C) would help identify the source.

 

I know it is running because I have an HC05 and the pic is talking to my terminal. Pins are currently floating. I have not had a chance to investigate the speed that it is running. It is running in debug mode attached to the programmer. I have not yet checked if it runs in production mode.

I don't understand point 4.

 

There are different debug modes. Some don't even use the crystal frequency. You need to set the debug frequency to the intended crustal frequency if you are doing timings. In MPLAB 8.82, the default debug frequency is 20 MHz.

At DC,you can use a calendar for timing. That is much like SPI and other protocols that are spec'd to DC. Doesn't mean they have any usable function at DC, but it does mean you can use a very slow clock.

Edit: I don't date back far enough, but I assume slow stepping could be used for debugging in the old days.

 

I need to do more experimenting but it at least appears to not run in production mode.

I typically use much
I don'r know about a "debug frequency", from my experience the pic runs at the selected frequency. I typically use much lower frequencies than 20mhz and the chip as always run at the speed I expected.

 

Edit: I don't date back far enough, but I assume slow stepping could be used for debugging in the old days.

I don't know that slow stepping or single stepping was ever a widely-used debugging method.

The first and only CMOS micro I ever used before I started with PICs was the Motorola MC68HC11. While it could be operated with an arbitrarily low clock frequency, it was far easier to run it at speed and use a "monitor" program (such as Motorola's BUFFALO) in EPROM or ROM to manage debugging operations.

Until the advent of CMOS processors, micros were typically NMOS and used dynamic internal storage for registers; these could not be slow-clocked or single-stepped. The very earliest parts, such as the Intel 4040 (the first micro I ever worked with) were PMOS, with the same limitation.

 

#pragma config FCMEN = ON // Fail-Safe Clock Monitor (Enabled)
#pragma config IESO = ON // Internal External Oscillator Switch Over Mode (Enabled)

You have the fail safe clock monitor (FCMEM) enabled. That means that if the external clock fails the pic will automagically switch to the internal clock.

 

You have the fail safe clock monitor (FCMEM) enabled. That means that if the external clock fails the pic will automagically switch to the internal clock.

And that is what is happening. It is running on the internal osc 8MHZ.

I changed that configuration bit and it now does not run in production. But it still runs in debug.

Thanks.

another question. I have the configuration bit set so clock comes out on RA6. But it looks like it is the instruction clock rather than OSC. Is that what I should expect?

 

Wait I was incorrect. It is still running. Here is the new configuration.

/ PIC18F27J13 Configuration Bit Settings

// 'C' source line config statements

// CONFIG1L
#pragma config WDTEN = OFF // Watchdog Timer (Disabled - Controlled by SWDTEN bit)
#pragma config PLLDIV = 1 // 96MHz PLL Prescaler Selection (PLLSEL=0) (No prescale (4 MHz oscillator input drives PLL directly))
#pragma config CFGPLLEN = OFF // PLL Enable Configuration Bit (PLL Disabled)
#pragma config STVREN = ON // Stack Overflow/Underflow Reset (Enabled)
#pragma config XINST = OFF // Extended Instruction Set (Disabled)

// CONFIG1H
#pragma config CP0 = OFF // Code Protect (Program memory is not code-protected)

// CONFIG2L
#pragma config OSC = EC // Oscillator (INTOSC)
#pragma config SOSCSEL = HIGH // T1OSC/SOSC Power Selection Bits (High Power T1OSC/SOSC circuit selected)
#pragma config CLKOEC =ON // EC Clock Out Enable Bit (CLKO output disabled on the RA6 pin)
#pragma config FCMEN = OFF // Fail-Safe Clock Monitor (Enabled)
#pragma config IESO = ON // Internal External Oscillator Switch Over Mode (Enabled)

// CONFIG2H
#pragma config WDTPS = 32768 // Watchdog Postscaler (1:32768)

// CONFIG3L
#pragma config DSWDTOSC = INTOSCREF// DSWDT Clock Select (DSWDT uses INTRC)
#pragma config RTCOSC = T1OSCREF// RTCC Clock Select (RTCC uses T1OSC/T1CKI)
#pragma config DSBOREN = OFF // Deep Sleep BOR (Disabled)
#pragma config DSWDTEN = OFF // Deep Sleep Watchdog Timer (Disabled)
#pragma config DSWDTPS = G2 // Deep Sleep Watchdog Postscaler (1:2,147,483,648 (25.7 days))

// CONFIG3H
#pragma config IOL1WAY = ON // IOLOCK One-Way Set Enable bit (The IOLOCK bit (PPSCON<0>) can be set once)
#pragma config ADCSEL = BIT10 // ADC 10 or 12 Bit Select (10 - Bit ADC Enabled)
#pragma config PLLSEL = PLL4X // PLL Selection Bit (Selects 4x PLL)
#pragma config MSSP7B_EN = MSK7 // MSSP address masking (7 Bit address masking mode)

// CONFIG4L
#pragma config WPFP = PAGE_127 // Write/Erase Protect Page Start/End Location (Write Protect Program Flash Page 127)
#pragma config WPCFG = OFF // Write/Erase Protect Configuration Region (Configuration Words page not erase/write-protected)

// CONFIG4H
#pragma config WPDIS = OFF // Write Protect Disable bit (WPFP<6:0>/WPEND region ignored)
#pragma config WPEND = PAGE_WPFP// Write/Erase Protect Region Select bit (valid when WPDIS = 0) (Pages WPFP<6:0> through Configuration Words erase/write protected)

 

Looks like this was the issue


#pragma config IESO = ON // Internal External Oscillator Switch Over Mode (Enabled)

When I disabled it the pic no longer runs.

But thanks for pointing me in the right direction.

 

So now we have zombie microcontrollers to worry about? Great.

 

#pragma config IESO = ON // Internal External Oscillator Switch Over Mode (Enabled)

I did include this line in the quote in my original message but I didn't think it would do the switchover automatically by itself.

 

"An inaccurate clock is better than no clock at all"

I never understood this logic, If you need a crystal for accuracy, why fail-back to an RC clock?
So now your MCU can report that it's broken, at an erroneous baud rate?

 

"An inaccurate clock is better than no clock at all"

I never understood this logic, If you need a crystal for accuracy, why fail-back to an RC clock?
So now your MCU can report that it's broken, at an erroneous baud rate?

I can see circumstances where it would be useful but I have never used it myself.
If there is no clock there is no way the pic can signal that it has a problem. At least on the internal clock (and you can check whether it has switched over) it can tell you that is isn't working properly and can set the system to a safe state.

 

One specific example: I use the RC system clock for system and a 32.768 crystal for TMR1. Albeit, that is not one or the other, but it is a situation where clocks of different accuracy can be useful.