Not all caps, for same value, have same bypass performance, like ESR.

Normally one uses a combo of bulk and ceramic to get broad freq range
effectiveness.


Regards, Dana.

 

've built essentially the exact circuit you have

? with the gain , upper bandwidth . . .
___________________

(digging my pdf-s' db . . .)
https://exhibitors.electronica.de/d...0_8_1_800/2860_texasinstruments_thesignal.pdf
https://www.analog.com/media/en/technical-documentation/application-notes/an47fa.pdf
http://www.ti.com/lit/an/snoa818/snoa818.pdf
https://masteringelectronicsdesign.com/buildi-an-op-amp-spice-model-from-its-datasheet/
..

 

? with the gain , upper bandwidth . . .
___________________

(digging my pdf-s' db . . .)
https://www.analog.com/media/en/technical-documentation/application-notes/an47fa.pdf
http://www.ti.com/lit/an/snoa818/snoa818.pdf
..

Thanks for the app note. I've had a quick scan and it seems to be mostly about much higher frequency than I'm trying to achieve. i.e. I searched for "kHz" and didn't find anything down in the audio range. I will read it more carefully when I have time. I understand that if I wanted to make e.g. a video amplifier with a b/w of MHz rather than 10s of kHz that the game would be different. If there's something in there that struck you as being directly related to the problem I'm having can you point me at the figure or page reference?
Best regards
Dave

 

The fur on your sinusoid in Fig. 25 doesn't look periodic to me, and I wonder why you characterize it as an oscillation?

I gather that you're using a PC-connected scope, right? For what it's worth, I have a few USB-connected scopes and have noticed that they all inject some very low-level noise noise into my circuits as I probe them. That noise, multiplied by 100, might explain the fur you're seeing on your signal, even if you are being careful about grounds.

 

@Dave Lowther
A comment on your layout as shown in post#33:
Examine the connections of C5. One end connects via a nice short trace to IC1:8. The other end travels 3" (my estimate) before reaching the neg terminal of C2, the desired grounding point. Likewise, examine connections of C8. One end connects via a nice short trace to IC1:4. The other end travels perhaps 6-8" before reaching the desired grounding point at the neg terminal of C2. With such long paths to ground, C5 and C8 will have very little effect as bypasses; the inductance of the long paths will nullify any gain of having the bypass caps. When planning a layout, plan the must-be-short paths first, then let less critical paths work their way around as necessary.

@Dave Lowther
The goal of bypassing is to provide a low impedance from the power supply terminal(s) to ground for whatever frequencies the device you are bypassing is able to respond to, externally or internally. The frequencies you may be interested in are not relevant. Any lead/trace length adds inductance that increases impedance and can create resonances with stray and deliberate capacitances.

 

Hello,

This thread will also tell you more about the decoupling capacitors:
Decoupling or Bypass Capacitors, Why?

Bertus

 

The fur on your sinusoid in Fig. 25 doesn't look periodic to me, and I wonder why you characterize it as an oscillation?

I gather that you're using a PC-connected scope, right? For what it's worth, I have a few USB-connected scopes and have noticed that they all inject some very low-level noise noise into my circuits as I probe them. That noise, multiplied by 100, might explain the fur you're seeing on your signal, even if you are being careful about grounds.

Hi Curt,
Thanks for your continued interest in this. Fig 25 was taken from the multi-instrument PC software that's using the Roland Rubix 22 USB sound 'card' as its input. This doesn't seem to suffer from the noise problems that some USB oscilloscopes have. Other figures (26 and 27) in the PDF were taken using a PicoScope which is a USB connected scope and introduces some noise as you describe. I only used the PicoScope to investigate why it was oscillating. I didn't have it connected otherwise.

What happened with the test I was doing in Fig 25 is I was investigating how THD increased with increasing source impedance. I didn't focus on the behaviour as it changed from stable to unstable. I suspect the onset of the instability which I show in Fig 25 is related to the rail to rail oscillation square wave (fig 26 and fig 27) I get when the source impedance is infinite (open circuit input). The 'noise' in Fig 25 didn't look like the usual noise on PicoScope traces. IIRC (quite a big 'if') when I turned up the time base fig 25 looked like a higher frequency sine wave imposed on the 1kHz signal.

I suspect fig 27 contains a big clue. The exponential decay on pin 3, the non inverting input, looks just like an RC time constant decay to me. My estimate, in Fig 28, of the C being 33pf hasn't been commented on. I think I'd see the same waveform if I connected 33pf from pin1 (the output) to pin 3. I may be wrong but I don't think I've got 33pf of stray capacitance between pin 1 and pin 3. That guess is just based on remembering (correctly?) that to make a 2pf capacitor one could twist a couple of short insulated wires together. I've not got pin 3 capacitively coupled to pin 1 enough to account for 33pf AFAICT.

ATM I'm quite hopeful that AudioGuru's advice in post 2 is going to fix it. I'm going to try that mod first. I hope to do it tomorrow. I'll update this thread with the outcome.

Best regards
Dave

 

@Dave Lowther
The goal of bypassing is to provide a low impedance from the power supply terminal(s) to ground for whatever frequencies the device you are bypassing is able to respond to, externally or internally. The frequencies you may be interested in are not relevant. Any lead/trace length adds inductance that increases impedance and can create resonances with stray and deliberate capacitances.

Hello,

This thread will also tell you more about the decoupling capacitors:
Decoupling or Bypass Capacitors, Why?

Bertus

Thanks for those comments. I'll take a look tomorrow. I've got to do other stuff now. My rule of thumb for decoupling is 100nF monobloc per chip and 100nF monobloc + 47uf tantalum near the power input to the board. That rule was taught to me when I wasn't paying for the components myself. It was back in the 70s when I was designing with 74xx TTL clocked at a few MHz. I'm not sure of the pedigree of the 100nF caps I'm using now. They are from eBay, they measure 100nF ok on my C range of my multimeter but I've not checked frequency response and ESR etc.
Best regards
Dave

 

Thanks for those comments. I'll take a look tomorrow. I've got to do other stuff now. My rule of thumb for decoupling is 100nF monobloc per chip and 100nF monobloc + 47uf tantalum near the power input to the board. That rule was taught to me when I wasn't paying for the components myself. It was back in the 70s when I was designing with 74xx TTL clocked at a few MHz. I'm not sure of the pedigree of the 100nF caps I'm using now. They are from eBay, they measure 100nF ok on my C range of my multimeter but I've not checked frequency response and ESR etc.
Best regards
Dave

@Dave Lowther
Assuming that you someday get to a point where this is relevant, here's a suggested scheme for input protection of the LM4562 opamp. Since the LM4562 is powered by ±15V, its output cannot exceed that; since the gain is set at ~100, the input required to reach ±15 is ±0.15V. Thus, the input can be clamped to a low voltage, e.g. ±0.7V. The circuit shown does this. For + protection, a diode is biased with current through a 100K (not critical) resistor so that its forward voltage is about 0.7V; this diode can be any silicon diode (1N4148, 1N4001, etc). Connected to this diode is a low reverse current diode (e.g. BAS33) that connects to the opamp input. When the input exceeds about 1V, the low reverse current diode will begin to conduct, clamping the input to the already biased diode. The same scheme applies for negative inputs, with diodes reversed. This allows overloads up to the diode current ratings with very low capacitance and very low leakage current.
View attachment 184776

 

@Dave Lowther
since the gain is set at ~100, the input required to reach ±15 is ±0.15V. Thus, the input can be clamped to a low voltage, e.g. ±0.7V

Thanks for providing details of the clamping scheme. The circuit is ultimately intended to be an oscilloscope like front end for the sound card. I intend to make the gain switchable by switching in a range of higher values for R4. It will have switchable gains of 100, 50, 20, 10, 5 and 2. The reason I am currently using a gain of 100 is that it is worst case for THD, noise, and stability. The intended use is explained in the PDF I attached to my opening comment.

This is one I built a while ago.



It doesn't have a high impedance input. It also had some stability problems IIRC. I gave up on it and decided to investigate just the simple unswitched case first. I may re-use the case and switches (but it too was only an experiment). I really want one of these for each of the two input channels and something similar for the two output channels so I can use it as a signal generator.

Best regards
Dave

 

Thanks for providing details of the clamping scheme. The circuit is ultimately intended to be an oscilloscope like front end for the sound card. I intend to make the gain switchable by switching in a range of higher values for R4. It will have switchable gains of 100, 50, 20, 10, 5 and 2. The reason I am currently using a gain of 100 is that it is worst case for THD, noise, and stability. The intended use is explained in the PDF I attached to my opening comment.

This is one I built a while ago.

View attachment 184792

It doesn't have a high impedance input. It also had some stability problems IIRC. I gave up on it and decided to investigate just the simple unswitched case first. I may re-use the case and switches (but it too was only an experiment). I really want one of these for each of the two input channels and something similar for the two output channels so I can use it as a signal generator.

Best regards
Dave

@Dave Lowther
So, what you need for input protection will be determined by operation at gain=2, with Vin(max)=15/2=7.5V. An immediate solution would be to replace the prebiased diodes I specified with (e.g.) 9.1V zener diodes, such as the 1N4739A. The higher reverse voltage on the low leakage diodes will slightly increase the leakage, but probably still acceptably. Protection schemes that depend on the output of the LM4562 amplifier could be auto adjusting but a bit slower due to the propagation delay through the opamp; with such schemes the protection could be enabled when the LM4562 output reached (e.g.) ±12V. I suggest starting with the simple zener scheme (described above).

 

As previously discussed in this thread: I've had a look at the power supply noise and changed the decoupling.

I've specifically taken action based on these comments:
· 28 Curt Carpenter: “I'd check your power supply for noise in the 7-10KHz range”
· 37 to3metalcan: “makes me think it's your regulators <snip> so I suspect you're going to see that oscillation on your power supply rails”.
· 2 Audioguru: “Maybe because your + and - power supply connections on the perf board are not decoupled to ground?”
· 27 TeeKay6: “I see caps (C4 & C5) connected across the 30V (+/-15V) power, but I do not find the necessary bypass caps”

The short version of the story is that I measured about 100 mV of noise on the power supply pins of the op amp. After changing the decouping this has now dropped to less than 10mV. It's not fixed the oscillation.

The attached PDF (LogBook-Vol06-NoninvOscillationV2.pdf) contains more details. See sections 4.* for scope traces before and after the mod, plus changes to the circuit diagram and layout. The references to figures, sections, etc and the items in the contents list should be clickable links in your pdf viewer (they work for me in Acrobat DC).

I haven't tried putting a resistor in series with the op amp output yet. I'll try that later this week and any other simple changes I can make. I'm in two minds now about whether to spend time on layout changes on the perf board or whether to get a PCB made. I'll keep you all posted.

Thanks again to everyone that has commented in this thread. I really do appreciate it. I'm a bit isolated being retired and living in a small town in Somerset UK. I know nobody that I can talk to face to face about this kind of stuff.

[Edits to do: Comment 28 should be comment 23. Clicking on it goes to comment 23. There's a reference to section 0 in the PDF which should be a reference to 4.2]

Best regards
Dave

 

I should also modify the layout in fig 37 of the attachment in the previous post. I'll make the -ve terminal of C3 go to the top of C8. I don't expect it will make a noticeable difference but I'll do it anyway.

 

As previously discussed in this thread: I've had a look at the power supply noise and changed the decoupling.

I've specifically taken action based on these comments:
· 28 Curt Carpenter: “I'd check your power supply for noise in the 7-10KHz range”
· 37 to3metalcan: “makes me think it's your regulators <snip> so I suspect you're going to see that oscillation on your power supply rails”.
· 2 Audioguru: “Maybe because your + and - power supply connections on the perf board are not decoupled to ground?”
· 27 TeeKay6: “I see caps (C4 & C5) connected across the 30V (+/-15V) power, but I do not find the necessary bypass caps”

The short version of the story is that I measured about 100 mV of noise on the power supply pins of the op amp. After changing the decouping this has now dropped to less than 10mV. It's not fixed the oscillation.

The attached PDF (LogBook-Vol06-NoninvOscillationV2.pdf) contains more details. See sections 4.* for scope traces before and after the mod, plus changes to the circuit diagram and layout. The references to figures, sections, etc and the items in the contents list should be clickable links in your pdf viewer (they work for me in Acrobat DC).

I haven't tried putting a resistor in series with the op amp output yet. I'll try that later this week and any other simple changes I can make. I'm in two minds now about whether to spend time on layout changes on the perf board or whether to get a PCB made. I'll keep you all posted.

Thanks again to everyone that has commented in this thread. I really do appreciate it. I'm a bit isolated being retired and living in a small town in Somerset UK. I know nobody that I can talk to face to face about this kind of stuff.

[Edits to do: Comment 28 should be comment 23. Clicking on it goes to comment 23. There's a reference to section 0 in the PDF which should be a reference to 4.2]

Best regards
Dave

@Dave Lowther
You've done a good job improving the power supply bypassing, with obviously reduced ripple now seen.

However, we have not yet even touched what is the root problem. All the data you have provided indicates a very strong oscillation. What we need to find is some change (for testing) that affects (freq or amplitude) that oscillation. Thus far, I believe that only shorting JP1 (with JP2 shorted) eliminates the oscillation. Correct? Your scope traces of pin3 (Fig27) pretty clearly show that the output signal (IC1A:1) is coupling, capacitively & strongly, into things connected to that pin. Unfortunately, that does not mean that such coupling is the sole culprit, but it is clearly involved.

Things to try:
(We are trying to find changes that clearly affect the oscillation.)

*Do you have a scope trace of pin2 during oscillation (such as Fig27 for pin3)?
*Same for the ungrounded end of C2?
*Since the ckt oscillates anyway, what is the effect of removing JP2 (i.e. inserting R3)? With JP1 open? With JP1 shorted?
*With JP2 again shorted, place a small capacitance (e.g. try about 100pF, 1000pF) across the JP1 input (i.e. from pin1 to pin2). Effect?
*Insulate the flattest surface of your wired breadboard with heavy paper or cardboard and then place that surface against any grounded (to ckt ground) metal surface (alum foil? any metal). Effect? (Can we show that the feedback is coupling capacitively by reducing such coupling wherever it may be?)
*Place a 10K resistor in parallel with R5. Effect?
*If possible, disconnect wire at pin1 that runs to JP4. View output at pin1. Is signal different than with JP4 connected? (with antenna wire disconnected)

 

Thanks for the suggested plan of action TeeKay6. I'm off to bed now. Tomorrow I've got other stuff to do. Hopefully I'll find some time on Wed to do some more on it.

 

Thanks for the suggested plan of action TeeKay6. I'm off to bed now. Tomorrow I've got other stuff to do. Hopefully I'll find some time on Wed to do some more on it.

I added one item at end of Things to Try list.

 

@TeeKay6, I'll answer the questions I already know the answers to now.

@Dave Lowther
What we need to find is some change (for testing) that affects (freq or amplitude) that oscillation.

Agreed. As you may have noticed in the attachment, under figure 28, I tried halving / doubling C1 and C2 and this didn't affect the oscillation. I've also seen the oscillation frequency affected by connecting a short (~1ft) BNC cable to the input with nothing connected at the other end of the cable. IIRC it went up to about 20 kHz.

Thus far, I believe that only shorting JP1 (with JP2 shorted) eliminates the oscillation. Correct?

That's not quite correct. Connecting my oscillator to the input prevents it from oscillating. Table 2 in the attachment shows values of R3 (JP2 not shorted) that work without the oscillation when JP1 is connected to my oscillator.

Do you have a scope trace of pin2 during oscillation (such as Fig27 for pin3)?

Fig26 shows pin 2.

Same for the ungrounded end of C2?

I don't know. I'll get one later this week.

Since the ckt oscillates anyway, what is the effect of removing JP2 (i.e. inserting R3)? With JP1 open? With JP1 shorted?

I partly answered this above. The effect of removing JP2 when my oscillator is connected to the input is that THD goes up from 9ppm to 27ppm (Table 2 in the attachment). I've not tried removing JP2 when JP1 is open.

With JP2 again shorted, place a small capacitance (e.g. try about 100pF, 1000pF) across the JP1 input (i.e. from pin1 to pin2). Effect?

I don't know at the moment. I'll find out and report back later this week.

Insulate the flattest surface of your wired breadboard with heavy paper or cardboard and then place that surface against any grounded (to ckt ground) metal surface (alum foil? any metal). Effect?

. The board is normally bolted to (and grounded to) the lid of the die cast box (Fig15 and Fig16). Note that I'm not using the board shown in Fig16 (although it behaves the same). I'm using the board shown in Fig23 and Fig24 plus the recent decoupling changes. The stand off height is 2 m2 nuts, about 3.5mm + a thin sheet of plastic and a washer. Maybe 5mm in total. I could try running the board not bolted to the lid to see if that causes a change. I'll do that later this week.

Place a 10K resistor in parallel with R5. Effect?
If possible, disconnect wire at pin1 that runs to JP4. View output at pin1. Is signal different than with JP4 connected? (with antenna wire disconnected)

I'll try those things later this week.
Best regards
Dave

 

@TeeKay6, I'll answer the questions I already know the answers to now.
Agreed. As you may have noticed in the attachment, under figure 28, I tried halving / doubling C1 and C2 and this didn't affect the oscillation. I've also seen the oscillation frequency affected by connecting a short (~1ft) BNC cable to the input with nothing connected at the other end of the cable. IIRC it went up to about 20 kHz.
That's not quite correct. Connecting my oscillator to the input prevents it from oscillating. Table 2 in the attachment shows values of R3 (JP2 not shorted) that work without the oscillation when JP1 is connected to my oscillator.
Fig26 shows pin 2.
I don't know. I'll get one later this week.
I partly answered this above. The effect of removing JP2 when my oscillator is connected to the input is that THD goes up from 9ppm to 27ppm (Table 2 in the attachment). I've not tried removing JP2 when JP1 is open.
I don't know at the moment. I'll find out and report back later this week.
. The board is normally bolted to (and grounded to) the lid of the die cast box (Fig15 and Fig16). Note that I'm not using the board shown in Fig16 (although it behaves the same). I'm using the board shown in Fig23 and Fig24 plus the recent decoupling changes. The stand off height is 2 m2 nuts, about 3.5mm + a thin sheet of plastic and a washer. Maybe 5mm in total. I could try running the board not bolted to the lid to see if that causes a change. I'll do that later this week.
I'll try those things later this week.
Best regards
Dave

@Dave Lowther
1. Connecting the coax to the input is the same as placing a small cap across the input, so you have done that test already. This is simply more confirmation that pin3 is picking up the feedback signal causing the oscillation.
2. If I understand Table2 correctly, the oscillation is not noticeable with input=signal generator and R3 ≤ 10K. As R3 increases, the oscillation "seems" to increase. To me that indicates that the feedback pickup is primarily on the opamp side of R3--or there is at least sufficient pickup on that side of R3 to sustain oscillation despite the other end of R3 being grounded via the signal gen.
3. Since Fig26 looks exactly as expected, I fully expect the signal at C2 to be very small...but a quick check doesn't hurt.
4. You have already done all the tests I suggested for JP2.
5. I think it would still be worthwhile to look at the effect of having vs not having the metal case near/parallel to the breadboard.
6. If feasible, lets try an extreme cure case. Connect 0.1uF bypass caps directly (i.e. through the air but leads as short as possible) to the ground end of C2 (no need to remove existing bypass caps). Disconnect everything from pin3, at pin3, and then add a 470K-1M resistor (very short leads) from pin3 to the grounded end of C2. Disconnect everything from pin1, at pin1, except R5; JP4 will not be connected. Is oscillation still present at pin1? If yes, then I think we will not succeed in preventing oscillation with all components connected normally on the breadboard. If the oscillation is not present, convert the breadboard--one step at a time--back to the original condition, noting conditions when the oscillation returns
7. If 6. (above) does not kill the oscillation, then I do not expect a PCB layout would either (unless we did extreme shielding on the PCB)...unless we are still missing some gross difference between the schematic and the breadboard.

@Dave Lowther
UPDATE: Item 6. above, minor revision.

 

@TeeKay6,
You do understand table 2 correctly.
I'll try the things you suggested. Hopefully I'll have time tomorrow. I'll report back when I've got some more information.
Thanks again for all your help
Dave

 

@TeeKay6,

@TeeKay6,
I'll try the things you suggested. Hopefully I'll have time tomorrow.

I'm not going to have time to do item 6 (extreme cure) today. I'll do that tomorrow. I've done 3 (trace of C2) and 5 (remove board from grounded lid). Traces are in the attchment LogBook-Vol06-NoninvOscillationV3.pdf fig40 and fig41. The ground plane removal made no difference. There's some photos fig42, and a bit more info in the attachment.
Best regards
Dave