Can anyone please tell me what the configuration of this FET is and perhaps explain why.
Thanks in advance.

 

Did you forget to include an image in your post, cuz I don't see no FET

 

Hello,

Is there a picture available?
Without any, we can not answer.

Bertus

 

This should be the diagram now. Apologies.

 

All of the capacitors are probably chosen so that, at the signal frequencies of interest, they look like short circuits. So consider the names of the three basic amplifier configurations and see if that gives you an idea.

 

Note that the transistor is a depletion-mode N-JFET which is required for the circuit to properly bias.

 

The configuration is common source but I'm not sure how this differs from common drain/gate

 

The configuration is common source but I'm not sure how this differs from common drain/gate

A common-drain (source-follower) circuit has a high input impedance, a voltage gain of slightly less than 1, no signal inversion, and a low output impedance.

A common-gate circuit (signal applied to source) has a low input impedance, a current-gain of 1, and no signal inversion.