What are these extra inputs for a JK Flip Flop?

Thread Starter

SiCEngineer

Joined May 22, 2019
147
I have been using latches recently and know a JK Flip flop typically has 5 pins, J K CLK Q and !Q. I have came across a document which has two extra inputs which I don't understand because of my lack of experience with them.

Can anyone help me identify what they are? Is there a way to simulate them in software with a model with only 5 pins?
 

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AlbertHall

Joined Jun 4, 2014
9,333
The other two are Set and Reset.
IIRC some chips these pins are synchronous (the action needs a clock pulse) and some are asynchronous (the action happens immediately regardless of the clock). You need to check the datasheet for the particular chip.
 

Papabravo

Joined Feb 24, 2006
12,979
J&K can be used to set and clear the FF synchronously, so if those extra inputs are present, they are probably asynchronous. As always, consult the datasheet for details.
 

Thread Starter

SiCEngineer

Joined May 22, 2019
147
J&K can be used to set and clear the FF synchronously, so if those extra inputs are present, they are probably asynchronous. As always, consult the datasheet for details.
I am simulating in PLECS at the moment, where those are not available to me, it is a 5-pin device. However if I need to simulate the circuit, how would I do that without the extra two inputs?
 

TeeKay6

Joined Apr 20, 2019
572
Connect the extra inputs to either ground if they are active high (most CMOS devices), or V+ if they are active low (most TTL series devices).
Except for CMOS devices that emulate TTL devices; then S and R are active low like the TTL parts. (e.g. MM74HC74)
 
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