Here is a problem I encountered in the Lab today and would love to hear your thoughts about it.
I was testing a LLC converter I designed under high voltage (500V) and after couple of test under low power (100kHz, 300ns dead time), upper MOSFETs (SCT3160) of H-bridge got damaged. Both of the damaged MOSFETs had gate and source shorted. I replaced the both MOSFETs with new ones and checked the drain source voltage with a differential probe and saw there were a voltage spike of 30V on each of the upper side MOSFETs. However, there was no visible spikes on the MOSFET gate of lower bridge. This voltage spike is not present when the no voltage is applied to the input terminals of the H-bridge and increases with applied voltage. Since, I am not drawing any current it is surely not due to hard switching of the MOSFETs. Which begs the question what can cause this spikes?
Here are some information on the design:
My gate driver schematic for one leg looks like this:
The upper bridge is supplied from a separate 15V isolated DC-DC converter (SPU02N-15). The schematics for this is shown in attachment.
I would like to bring to your attention is the boot strap arrangement for the upper MOSFETs. I avoided the boot-strap diode by connecting VB to + of 15V isolated DC-DC and -ve end to switching node. I have used no bootstrap diode in between them. Do you think this could cause potential problem? Additionally I used a 10k resistance between gate node and switch node to make sure gate voltage is not floating? Is that a good practice?
I don't know if it helps here is a snapshot of the layout of the MOSFET gate drivers
Since this is the first time I have undertaken hardware project my knowledge in this field is limited and your kind help is solicited.
I was testing a LLC converter I designed under high voltage (500V) and after couple of test under low power (100kHz, 300ns dead time), upper MOSFETs (SCT3160) of H-bridge got damaged. Both of the damaged MOSFETs had gate and source shorted. I replaced the both MOSFETs with new ones and checked the drain source voltage with a differential probe and saw there were a voltage spike of 30V on each of the upper side MOSFETs. However, there was no visible spikes on the MOSFET gate of lower bridge. This voltage spike is not present when the no voltage is applied to the input terminals of the H-bridge and increases with applied voltage. Since, I am not drawing any current it is surely not due to hard switching of the MOSFETs. Which begs the question what can cause this spikes?
Here are some information on the design:
My gate driver schematic for one leg looks like this:
The upper bridge is supplied from a separate 15V isolated DC-DC converter (SPU02N-15). The schematics for this is shown in attachment.
I would like to bring to your attention is the boot strap arrangement for the upper MOSFETs. I avoided the boot-strap diode by connecting VB to + of 15V isolated DC-DC and -ve end to switching node. I have used no bootstrap diode in between them. Do you think this could cause potential problem? Additionally I used a 10k resistance between gate node and switch node to make sure gate voltage is not floating? Is that a good practice?
I don't know if it helps here is a snapshot of the layout of the MOSFET gate drivers
Since this is the first time I have undertaken hardware project my knowledge in this field is limited and your kind help is solicited.
