There are something that i don't understand

As you can see in this circuit they represent the input voltage (V1) without the symbol of a voltage source, so i could think that the circuit is open and there are no currents in the mesh....

I want to know if the first circuit is equivalent with this circuit

 

Schematics are a language. There are variations that you will learn to recognize as being equal. Generally, both schematics are the same if V1 is the same.

 

As I can recognize (I'm a student) the only difference is that you know in the second circuit you have a voltage generator, in the first you have just a voltage. No practical difference at all as Mr. Lestraveled wrote first.

When we draw a circuit, we have to make some semplification couse we are using a model. A model is used to explane and communicate something that is more complex in real world, so we choose which aspect we want focus on.

The details you insert in your schema (the model) depend on what are you doing and what the schema is drawn for. Usually we have to balance a schema between the very detailed model of "real world" and the approximative "abstraction" due to garantee also a good readability.

And, of course, schema is also a languages with local differences and common use.

Have a good electronics!

 

I agree john. They don't have any practical difference. The only difference is the way of presentation.

 

There is a difference; use #1 if you are talking about it, use #2 if you are going to simulate it, or otherwise work with it.

Note that you have to explicitly show the voltage source, set its value, set explict values for the components, name nodes, specify which node is the reference node, and tell the simulator what kind of simulation you want to do, and then finally select a node to be plotted...

 

Thanks for answering, but finally in general how to know if the notation is of an open circuit or of a voltage source

 

Thanks for answering, but finally in general how to know if the notation is of an open circuit or of a voltage source

Look how I labeled the nodes in the simulatable circuit. If you are talking about a voltage at a node, label the node...

Note that #1 is inconsistent. On the left end, a voltage source is implied. On the right end, the voltage at the top-right node with respect to the bottom node is implied.

 

ok, thanks for explanations