Hello,

Does anyone have this value?
The data sheet does not show the value for Cc (C sub c) the only capacitor in the internal diagram of the LM358.
I did some tests and came up with a rough value but would like to see if there is any documentation to confirm this.

 

In the discrete circuits it is in the 10-20pF range... FWIW

5pF
From: http://pdf.datasheetcatalog.com/datasheets/166/49945_DS.pdf

 

In the discrete circuits it is in the 10-20pF range... FWIW

5pF
From: http://pdf.datasheetcatalog.com/datasheets/166/49945_DS.pdf
View attachment 208246

Hey thanks Sam.
Funny i remembered 10pf too but then a test in a sim revealed it to be 7pf. Perhaps the 5pf is what they show to make it look like it has a better bandwidth, but then again i did not go through much trouble to find that 7pf.
It's amazing how much that little 5pf cap can make on the bandwidth as it is in the feedback path.

 

What do you suppose is the tolerance on that value? The values derived from your experiments should inform your understanding of the uncertainty. My guess would be -1 pf to +15 pf would be reasonable.

 

What do you suppose is the tolerance on that value? The values derived from your experiments should inform your understanding of the uncertainty. My guess would be -1 pf to +15 pf would be reasonable.

Well from my limited number of experiments i dont think you can go higher than about 10pf in total capacitance if you want the bandwidth to fall into the range indicated on the data sheet.
I might do more later though to see if i can narrow it down a little better.
My limited experiment was that it takes about 7pf plus or minus maybe 0.4pf to get 500kHz bandwidth with 0.1v peak sine wave with an inverting amplifier setup with 1k resistors setting the gain to 1: 1k input and 1k feedback resistors. With 5pf it is gong to be a little higher, maybe 700kHz but i didnt test that yet.
You can take this farther if you want too, the more reasonable model appears in the Texas Instruments data sheet though but it does not show the values of Cc, and neither did the National Semi data sheet from long ago. I thought maybe TI left out the value as they sometimes dumb down the data sheets that they take over, but National Semi left the value out also. Motorola shows it.

This was done all in the name of finding out how much delay there would be for the op amp when it comes out of saturation. In the past real life experiments i did on a breadboard back in the 1980's i found that it was much higher than i ever expected limiting the usefulness to a much lower bandwidth. This came about when using it in a 'precision' rectifier circuit.

The value of Cc also affects the output phase shift substantially as the input frequency goes up.

It is funny that the saturation delay is not mentioned at all on any data sheets. I would have never known this if i did not see it myself first hand at that time in the past.
I think the delay can vary quite a bit depending on how long the device remains in saturation because it all depends on how long that Cc cap has to charge to a value that is way out of range of the normal DC voltage across it when not in saturation. Once it charges up, it takes time to discharge back to the normal non sat value range so it causes a delay on the output such that the output can not change until the cap discharges.

 

Well from my limited number of experiments i dont think you can go higher than about 10pf in total capacitance if you want the bandwidth to fall into the range indicated on the data sheet.
I might do more later though to see if i can narrow it down a little better.
My limited experiment was that it takes about 7pf plus or minus maybe 0.4pf to get 500kHz bandwidth with 0.1v peak sine wave with an inverting amplifier setup with 1k resistors setting the gain to 1: 1k input and 1k feedback resistors. With 5pf it is gong to be a little higher, maybe 700kHz but i didnt test that yet.
You can take this farther if you want too, the more reasonable model appears in the Texas Instruments data sheet though but it does not show the values of Cc, and neither did the National Semi data sheet from long ago. I thought maybe TI left out the value as they sometimes dumb down the data sheets that they take over, but National Semi left the value out also. Motorola shows it.

This was done all in the name of finding out how much delay there would be for the op amp when it comes out of saturation. In the past real life experiments i did on a breadboard back in the 1980's i found that it was much higher than i ever expected limiting the usefulness to a much lower bandwidth. This came about when using it in a 'precision' rectifier circuit.

The value of Cc also affects the output phase shift substantially as the input frequency goes up.

It is funny that the saturation delay is not mentioned at all on any data sheets. I would have never known this if i did not see it myself first hand at that time in the past.
I think the delay can vary quite a bit depending on how long the device remains in saturation because it all depends on how long that Cc cap has to charge to a value that is way out of range of the normal DC voltage across it when not in saturation. Once it charges up, it takes time to discharge back to the normal non sat value range so it causes a delay on the output such that the output can not change until the cap discharges.

The reason I mentioned it was that I was going through a textbook, that was a revision of a previous edition, and there is now a whole chapter on fabrication processes with attention to things that can and cannot be controlled, with particular emphasis on internal device parameters. The author's opinion was more sanguine when it came to the fabrication of external discrete components. It was the first time I have ever seen a capacitor explicitly shown as being fabricated inside a chip, and given the age of the design was wondering about the ability to achieve reliable and repeatable values. I'm quite surprised to see a tighter range than I imagined

 

The reason I mentioned it was that I was going through a textbook, that was a revision of a previous edition, and there is now a whole chapter on fabrication processes with attention to things that can and cannot be controlled, with particular emphasis on internal device parameters. The author's opinion was more sanguine when it came to the fabrication of external discrete components. It was the first time I have ever seen a capacitor explicitly shown as being fabricated inside a chip, and given the age of the design was wondering about the ability to achieve reliable and repeatable values. I'm quite surprised to see a tighter range than I imagined

Hi,

Oh i am sorry i thought you meant the tolerance of the MEASUREMENT via either simulation or real life measurement. I measured the bandwidth in a sim and determined the cap value cant be too high around 7pf that way. However, this may correlate to the tolerance achievable with the fab process too because i doubt they could claim a bandwidth of 1MHz if they could not control that cap value too well. For example if it goes up to 10pf the bandwidth falls. I think they can achieve 1 percent tolerance because the dimensions are so well controlled, but there may also be some voltage dependence that i cant test in simulation i would have to do it with a real device. Anyone care to test one? Actually this parameter could be very hard to test.

I will try to check this out better in simulation later using the 3db bandwidth method.

 

I made a spice model of such an operational amplifier on transistors. I took a diode as a correction capacitor. I mean, the barrier capacitance of this capacitor is used. The capacitance is non-linear. It's made similar to the collector pn-junction of the transistor. The model reproduces the datasheet. Here's the diode model:
.model Dck d cjo=12.5p mj=0.33 vJ=0.75

 

I made a spice model of such an operational amplifier on transistors. I took a diode as a correction capacitor. I mean, the barrier capacitance of this capacitor is used. The capacitance is non-linear. It's made similar to the collector pn-junction of the transistor. The model reproduces the datasheet. Here's the diode model:
.model Dck d cjo=12.5p mj=0.33 vJ=0.75

Hi,

Yes that is a very good idea especially since that is probably the way they made the capacitor in the fabrication process ... a reverse biased Si diode.

The model i am using might be different from yours though so you might show those models.

 

The reason I mentioned it was that I was going through a textbook, that was a revision of a previous edition, and there is now a whole chapter on fabrication processes with attention to things that can and cannot be controlled, with particular emphasis on internal device parameters. The author's opinion was more sanguine when it came to the fabrication of external discrete components. It was the first time I have ever seen a capacitor explicitly shown as being fabricated inside a chip, and given the age of the design was wondering about the ability to achieve reliable and repeatable values. I'm quite surprised to see a tighter range than I imagined

Ok for the models i am using i get a closer value of 5.4pf which agrees with the Motorola value close enough.
When i compare the frequency response using this cap value with the behavioral model i downloaded the -3.01db points match being at 666kHz with the op amp set up as inverting with two 1k resistors and power supplies of plus and minus 10 volts.

6pf almost gets it but 5.4pf is better, and the 6pf matches with a previous spice circuit i had drawn which had 60pf which is probably because i was experimenting with 10 times the normal capacitance.

 

See

 

See
View attachment 208352

Very good i will compare it with mine, thanks.

 

See

 

See
View attachment 208357

Ok great.

Here are my results in graphic form.
The capacitance varied from about 5pf to 10pf over the range of DC bias of 15vdc to 1vdc respectively.
The value of capacitance is read off from only the peak value of the waves below so 1vdc produced a capacitance value of about 10pf for example while 15vdc produced a capacitance value of about 4.8pf.
Ignore the x axis ordinates they are arbitrary.

Since the experiments with a change of capacitance had shown that the bandwidth varies with that capacitance value, this means the bandwidth should be a less with lower DC capacitor bias voltages. Next we would have to look at the typical DC voltage values when operating the op amp in typical applications to see what we might expect.