Hi all

I have this question where i am supposed to use a 74'85 comparator (with some other gates) to output a 1 whenever a 2's complement number is between -5 to 3.

My first thought since the table

0011 3 0010 2 0001 1 0000 0 1111 −1 1110 −2 1101 −3 1100 −4 1011 −5

is to check whether the 2 last bits are 00 or 11, since the first 2 bits are always (00,01,10,11), but i am not sure how to implement it on a comparator.

Any kind soul could point me in the right direction?

thanks.

 

I would get the datasheet for the 7485. Note that the device has outputs for A>B and A<B as well as equality.

Start with constructing a truth table and see what you can do.

 

A comparator compares two numbers. In your case, one is variable and the other is set by you.

When your number is positive (MSB=0) you compare with 4 and look at the "<" output.
When your number is negative (MSB=1) you compare with 2 and look at the ">" output.

Does that logic put you in any thoughts?

 

Ah ok i get it now.

So basically need to get a SOP expression as a function of (+ve/-ve flag) to generate 2 or 4, plug into the b0-b4 input, plug the input into the a0-a4 input, and then combine the (+ve/-ve flag) with the "<" or ">" output to give a 1 whenever (+ve AND <) or (-ve AND >) is true.

 

You got it! MUXs can help you here if you don't want to use many ICs. You can use three 2-to-1 MUX for the threshhold input and one 2-to-1 to get the correct output signal (">" or "<").