Hi, all.

A few years ago, I go I put on Circuit 1 from the image on a breadboard. I have drawn only the first timer, but I assembled both timers on the 556. This is supposed to bring the output high when the input (discharge) goes low, and the output stays high as long as the input goes low. I don't remember where I got this circuit from, but this was a few years ago, and I can't understand it now. The circuit is on the breadboard and it's working as intended. What confuses me the most is how control and reset seem to be swapped... I tried to replicate this circuit using a 555 and it doesn't work. However, Circuit 2 in the image works exactly as Circuit 1.

Can someone explain how Circuit 1 works and how come I'm unable to replicate it on a 555? I swear I checked, and double checked, and triple checked and what I put on a breadboard a few years ago and still works as intended is Circuit 1.

And another question. I'm trying to replicate the behavior of the circuit on a 558. I put Circuit 3 on a breadboard, but it doesn't do exactly what I want. When the input (trigger) goes low, the input goes high, but only for the time determined by RC (10K and 10uF). I want the output to stay high while the input is low. How can I do that? By the way, the output of the 558 is pulled up by a 10K resistor that I forgot to include in the schematic!

Thanks!

 

This is a snippet of a project I'm starting:
Pins 4 & 8 are connected to power (in my case, 12VDC)
Pins 2 & 6 are jumper together (usually)
Pin 1 is grounded. Pin 5 (optional) can be grounded through a .001µF cap
Pin 7 is Discharge. It can be used as a control (optional output of GND or floating)
Pin 3 is Output, either High or Low
In your drawing I'm not seeing the same thing. But I'm no expert on 555's.
View attachment 357332

 

Circuit 1 looks wrong to me. For example, pin 2 (threshold) connects internally to a high impedance input of a comparator, so won't function as an output. Also, pin1 isn't discharging anything.

 

Here are the basics of the 555 timer operation which may help you understand its operation:
It's basically a FF latch with level-sensitive set and reset inputs (TRIG and THRS) with an added discharge pin.

When the TRIGger voltage goes below 1/3 Vcc, (and the THRS voltage is below 2/3 Vcc), the FF is Set (OUTput high and DIScharge open).

When the THRShold voltage goes above 2/3 Vcc (and the TRIG voltage is above 1/3 Vcc), the FF is Cleared (OUT low, and DIScharge connected to ground by the transistor to discharge the timing capacitor).

The RST (Reset) terminal Clears the FF when driven low (<0.5V). It can be connected to Vcc for normal operation.

The CV (Control Voltage) terminal is connected between the top two resistors of the three internal 5kΩ voltage divider resistors that determine the 1/3 and 2/3 Vcc trigger points. It is typically used to add a 10nF capacitor to GND if there is a concern about Vcc noise affecting the 555 timing. It can also be used as an input to adjust the triggers points and thus the timing, for such applications as PWM (Pulse-Width-Modulation).

 

Circuit 1 looks wrong to me. For example, pin 2 (threshold) connects internally to a high impedance input of a comparator, so won't function as an output. Also, pin1 isn't discharging anything.

Indeed.
It is completely wrong. The reset pin connects to a capacitor to ground? The control voltage directly to the +5?