https://www.allaboutcircuits.com/technical-articles-preview/422351

 

The following is incorrect:

The idealized circuit shown above is not a practical implementation because the op-amp’s offset voltage will charge up the capacitor and cause the amplifier to saturate.

The op amp's offset voltage is NOT what causes the integrating capacitor to charge up; it's the op amp's input bias current. This is why nearly all charge amp designs are done with FET-input op amps or CMOS op amps. Bipolar op amps are rarely (never?) used because of their substantial input bias current.

Also in the "A Realistic Charge Amplifier" section, the diagram should show a small resistor (I've usually used anywhere from 100Ω to 1 kΩ or so) isolating the piezo transducer and connecting cable from the op amp's inverting input and the integrating capacitor. This is often needed to avoid severe amplitude response peaking (or even oscillation) at high frequencies. I don't know whether or not you want to get that picky, though.

 

The op amp's offset voltage is NOT what causes the integrating capacitor to charge up; it's the op amp's input bias current. This is why nearly all charge amp designs are done with FET-input op amps or CMOS op amps. Bipolar op amps are rarely (never?) used because of their substantial input bias current.

I don't doubt that you're correct, but it's a little distressing considering I pulled that information directly from a TI app note: "The ideal integrator circuit will saturate to the supply rails depending on the polarity of the input offset voltage." My original statement was more vague, but after reading the description in the TI document I decided to specifically mention the offset voltage. So you're sure that the input bias current is the primary issue here? I honestly don't know much about the specifics in this case; all I can say is that my intuition tells me that some sort of nonideality somewhere in the circuit will eventually charge the cap and turn the op-amp into an open-loop amplifier.

Also in the "A Realistic Charge Amplifier" section, the diagram should show a small resistor (I've usually used anywhere from 100Ω to 1 kΩ or so) isolating the piezo transducer and connecting cable from the op amp's inverting input and the integrating capacitor. This is often needed to avoid severe amplitude response peaking (or even oscillation) at high frequencies. I don't know whether or not you want to get that picky, though.

I was hoping to avoid that level of detail, not only because the article was getting too long but also because my statements about the parallel capacitance not influencing circuit operation would become incorrect. If there is resistance connected to the inverting input, the internal capacitance and cable capacitance affect the frequency response.

 

I don't doubt that you're correct, but it's a little distressing considering I pulled that information directly from a TI app note: "The ideal integrator circuit will saturate to the supply rails depending on the polarity of the input offset voltage."

Yes, that certainly is disappointing, because it's dead wrong. What app note was this?

So you're sure that the input bias current is the primary issue here?

Absolutely, 100% certain. Input offset voltage is unimportant.

If there is resistance connected to the inverting input, the internal capacitance and cable capacitance affect the frequency response.

That's true, but if the resistance is small it only affects the response at high frequencies, usually well above the highest signal frequency of interest. I've no objection to leaving that detail out, though, if it would complicate things.

 

Here's a link to the app note:

http://www.ti.com/lit/an/sboa275/sboa275.pdf

I'll make the change from offset voltage to input bias current. Thanks for catching this mistake.

I'll omit the detail about the resistance for now, but I'll include that information in a follow-up article.

 

Ah, I see the problem: that app note is discussing integrator circuits, not charge amplifiers. In that context, there is a DC current path from the op amp's inverting input through R1 and the input signal source Vin. And in that context, he's absolutely right: any input offset voltage of the op amp will cause a DC current through R1, eventually resulting in the integrator's output saturating.

That problem does not exist in a charge amplifier, because the piezo sensor cannot conduct DC. So in that application, input offset voltage is not important. Input bias current is, however.

 

Thanks for this clarification.

I just posted the follow-up article:

https://forum.allaboutcircuits.com/...-amplifiers-for-piezoelectric-sensors.153206/

 

I just posted the follow-up article:

https://forum.allaboutcircuits.com/...-amplifiers-for-piezoelectric-sensors.153206/

Much, MUCH better! Excellent article!