Thank you for the feedback, in the mean time I'll also grind away here. I'm getting a better feel for how things are interacting. I do need to turn this in in the morning, so any help would be appreciated. Thanks again.

 

That explains why they made the load RL so high, and the Zout very low,
so you could learn to improvise using CC stage for output, and CE for stage gains.

If the load wer within reason, then problems would arise to get the proper matching.

This way the load has no effect on the output signal generated at the CC output stage. The load is just a dummy as far as signal attenuation could accur.

Interesting....

 

The requirement says Vcc max, I take that to mean I don't have to use 18v. In trying to get good Vce, half way on the load line, and using Re2=62 the 18v was killing me. I'm shooting for 5ma or so for Ic2, by reducing Vcc I can get smaller Ic2's with the same Re2, does this make sense?

 

Yes
It makes absolute sense.

There giving you the max, so you have a choice on supply voltage to that point.

Now that's more like it.

You should have no problem now with your design...

 

I'm still have trouble mixing and matching an Ic2 of 5max with a Vce2 of 9v (assuming Vcc=18) and the combination of rpi2, Re2 and Rc1 to get the Rout I want. I think I'm making it too complicated?

 

Since they want you to do the calculations first and then build it and check the results, then it won't matter if your results are off, but they want to see if you know how to apply what you have learned and the way you implement it into a circuit.


So for starters.

You have chosen to use a CC stage for the output, to have the low Zout required.

So what would be the emitter resitor needed to attain this. (Zout < 8 ohms)

RE (emitter follower output) = ?

Whatever value you chose then now you can use a voltage divider to base bias it, or direct couple it to another stage feeding into it.

Volt. divider bias would require capacitive coupling between CE stage and CC stage.

Volt div. ?
or

Direct coupling?

Then we can proceed from there.

I can't guarantee I will give a successful circuit, but at least get you in a direction where someone else could pick up the ball and help out..

 

The initial work I did was with a voltage divider, but if direct coupling is easier we can go that way.

 

Let me see if I can get a higher Zin using direct coupling.

 

I'm working at this my self as we go along so who knows if this wilol work or not.


I'm going to post schematics, and were going to go through this one step at a time.

Starting with the output working back to the input.

VCC = 12v.
IC for output = 5mA.

I'll be back with a schematic.

 

Ok RE is given as 7.5 ohms.

Now R11 = 10 x R10 = ?

assume 0.7v. for Vbe.

37mV. is across R10.

VR11 = (VR10 + Vbe) = ?

current ,(I 11), through R11 = (VR11 / R11) =?
R12 = (VCC - VR11) / I 11. = ?

R12 =?

 

I got R12=1149
R11=75

 

Now to increase Zin enough to be able to get a CE amp to feed into it.

Take R12 and replace it with another emitter follower stage.

This will help increase Zin to the first stage.


Here are the steps.

What voltage do you have for VR11 write it down. (this is VR7 this schem.)

This will be the emitter voltage to the next stage.

Now choose to make VCE of Q3 to be 10v.

Now R8 = (VCC - VCEQ3 - VR7) / I 11 (where R7 was R11 of other schem.)

Make R9 10 x R7

then solve again for VR9, the current through R9, and solve for R1 of this schem.


Then show the answers for this schem.


The numbers are mixed up due to the program mixing them up when I draw a new schem.

Then we'll work from here.

 

Alright so make R12 the next standard resistor 1.2K ohms.

Please answer all questions at one time per post.

Check the above post if you havn't yet.

 

R8=(12-10.737-.737)/.0098
r8=204

r9=10(r7)=10(75)=750

i9=vr9/r9=1.437/750

r1=(12-1.437)/.0019
r1=5559

???

 

draw this schematic and label the resistors to the standard values.

200
750
5.6K

Now I'll see if a CE stage can work.

 

Alright Now a CE stage.

Make R10 = R9 = 750 ohms.

That means now gain will = (R10 / 2) / R11

To keep the Zin high choose a value of gain for this stage that will allow R11 to be multiplied by 10 - 20 times to give higher Zin to this stage.

So make Volt gain to be around 5 for now.

Now to calculate R11.

Always for CE amp the Q point should be 1/2 VCC, so VC = 6v.

ICQ4 then = (VCC - VC) / R10

Then (ICQ4 x R11) = VR11

VBQ4 is then (VR11 + Vbe) =?

Make R12 ,20 times R11, but no higher or run into base current problems...

IR12 is then (VCC - VBQ4) / R12 = ?

Now using ohms law calculate R13. ?



This already goes over the 20mA range by about 5ma. over.

But this will help you get in a direction of how to design one stage at a time.

It would take me a long time to work and rework values to get a suitable design against the 20mA parameter, but I'll stick around a little while yet if you have any questions, but try to get a thoro understanding of what I was doing per stage.


Please let me know if this was any help?

Thankyou.

 

I haven't the calc yet, just a few questions:

Rout=7.5||750?
Have you taken into account the Gain of 100 yet?
Rin=R13||R12

 

Very few schematics have your black background.
If you tried to print it then your printer will use all its ink or toner.

I made it negative and cropped it. It is fuzzy because you saved it as a JPG file type.

 

I haven't the calc yet, just a few questions:

Rout=7.5||750?
Have you taken into account the Gain of 100 yet?
Rin=R13||R12

Rout of the CE stage is 750 ohms R10, however R10//R9 is considered when calculating the gain.

Yes Rin is R13 // R12 also in parrallel with ((B+1) x R11 +re} BUT, with high enough Beta, a first approximation is used as Zin = to R 12, for calculations.

As I said I was working slowly towards the 100 mark gain, each CE stage at a time, but ran out of supply current, so no need to go further with these values,

What is needed is to rework the circuit values, starting with VCC or IC, or even trying to use a different config. all together, there is a lot to take into consideration, with a smallish 20mA. ceiling,

Are you understanding the main points, I'm trying to convey.

1. sometimes it's neccesary to increase Zin to A stage by substituting bias resistors, with another transistor stage.

2. To match impedances between stages requires either matching value for value, or making the collector resistor much lower than the next stage, base resistor.

3. Gain is obtained by taking ther whole Zout (RC // Rb of next stage) / RE.

4. Sometimes you have to juggle values or trade off higher gain to get higher Zin, or lower the Zin to get higher gain.


The basics of biasing a stage, CE, is make the voltage at the collector 1/2 VCC, then choose a value for Re, calculate Vb and make the base to ground resistor anny where from 10 - 20 times the RE resistor.

that will give some direction in getting a stage properly biased.

Theres a lot more to amp design, youll learn later on that your base voltage determines the max. input voltage allowed, or the Vin will dictate the VB of a stage, supply voltages are chosen to get the proper volt. swing, there are equations for that,

So I hope I was able to give some insight on how to get a stage biased properly, and how to match impedances, ect...

Again I wish ypou the best in this design challenge, THER are EXPERTS on this forum who can do a much better job than I can, I am only a hobbyisrt in this field, but I have designed succesful circuits to be able to share the graound basics to transistor stage design circuits.

Again wish you the best and have fun with it...

 

Thankyou audioguru
for doing the picture in white.

I forgot to change the background this time...