Ok, so my project is to make 2 traffic lights with different timings on their own using 3 555 timers... the idea is to use the first 555 timers output as the source for the other two timers.

the problem is that when I calculate for the resistor values, the timing for the circuit gets messed up. I looked into it and saw that the problem comes from the initial charging towards 1/3Vs for the capacitors... i could calculate it in, however for succeeding cycles, this charging cycle is no longer done..

so my question is that how would you design a circuit so that the capacitors never go below 1/3 Vs..


tl;dr the initial charging time of the cap from 0 to 1/3 Vs is messing with my timing because its not really present in net cycles, is there anyway to work around that problem or can i even have a vary the frequency and duty cycle automatically

 

https://courses.cs.washington.edu/courses/cse370/10wi/pdfs/lectures/17-SeqEx.pdf

This paper discusses a traffic intersection 2 light logic sequence. Perhaps reading it will assist you in designing your project.

You will need to scroll several pages into the document to reach the traffic light logic section