hi

what are the strong reasons to use the track and hold amplifier (THA) before ADC?

thanks

 

Given the utter lack of context, sure sounds like a homework or quiz question.

 

Given the utter lack of context, sure sounds like a homework or quiz question.

Hi WBahn

A time-interleaved analog-to-digital converter (ADC) samples an input signal at frequency through lower frequency ADCs that are clocked with time-delayed phases. However, deterministic timing deviations from the ideal sampling phase generate spurious tones around sub-harmonics of the sampling clock. Additionally, bandwidth offsets in the -interleaved ADC result in spurious tones around sub-harmonics of the clock which become more severe at high input frequencies.

To reduce the effect of phase errors and bandwidth mismatch, a track-and-hold amplifier (THA) uses a high-speed clock satisfying the Nyquist criteria to hold the analog voltage at the input of the ADCs. The benefit of the input THA is two-fold.

1) The THA holds the signal at the array of interleaved ADCs mitigating any deterministic errors in the n clock phases.

2) Reduces the effect of bandwidth mismatch because the THA relaxes the bandwidth requirements of the interleaved ADCs. In spite of these benefits, the THA process technology and topology must be chosen carefully such that its noise and distortion do not significantly degrade the time-interleaved ADC performance.


Reference:

K. N. Madsen, T. D. Gathman, S. Daneshgar, T. C. Oh, J. C. Li and J. F. Buckwalter, "A High-Linearity, 30 GS/s Track-and-Hold Amplifier and Time Interleaved Sample-and-Hold in an InP-on-CMOS Process," in IEEE Journal of Solid-State Circuits, vol. 50, no. 11, pp. 2692-2702, Nov. 2015.

The scores of GS/s ADCs require wideband and good linearity track-and-hold amplifiers (THAs) to accurately acquire the input signal. The high-performance THAs can significantly improve the dynamic performance of ADCs due to the following reasons:

1) the THA can alleviate the problems caused by signal skews and clock jitters because the following stages utilize the held voltage, which is constant value at hold-mode.

2) Secondly, the THA can greatly ease the bandwidth requirements for the following blocks. Therefore, a wideband THAs with low distortion are desirable for the scores of GS/s time-interleaved ADCs.

Reference:

S. Ma, H. Yu and J. Ren, "A 32.5-GS/s Sampler With Time-Interleaved Track-and-Hold Amplifier in 65-nm CMOS," in IEEE Transactions on Microwave Theory and Techniques, vol. 62, no. 12, pp. 3500-3511, Dec. 2014.

For those who are interested in this question as a assignment they can find many other source for this information.

Else if you can explain it in your easy style, it will be your positive contribution. The purpose of short and to the point question was to save precious time of every member in forum.

Thanks

 

Positive contribution to what? What is it about the material that you copied and pasted don't you understand? What is YOUR understanding of why a THA is useful?

 

Positive contribution to what? What is it about the material that you copied and pasted don't you understand? What is YOUR understanding of why a THA is useful?

One simple trade off is that your are eventually increasing the chip area. But looking for trade offs related to performance. Also do this play role (directly or indirectly) for selecting the MASTER SLAVE architecture?

Thanks