Hi team
I am looking at a stm32g0x1 part, there is a section in the errata about the usart that I don't quite understand what is means here. Does it mean if the second half of the stop bit is glitch to zero, received data may be corrupted?? (like the second image with RED marking at stop bit).
Errata on section 2.11.1:
I am looking at a stm32g0x1 part, there is a section in the errata about the usart that I don't quite understand what is means here. Does it mean if the second half of the stop bit is glitch to zero, received data may be corrupted?? (like the second image with RED marking at stop bit).
Errata on section 2.11.1: