like i said,
sorry for asking maybe dumb questions but im studing electronics by my self, and this books are only in english and english is not my first language.
i have 1 more question.

i'm studing the basic transistors topic
i dont know why, but when i read a simple transistor circuit i can calculate if it's in saturation, cutoff or operating point, but if u tell me to buil one of this circuits from cero i cant find the rigth values of resistors to set the circuit in any of this operating areas.
ie.

a npn transistor with a common emiter and base bias circuit:
i have a base voltage of DC 2 volts and i need a base current of 50 micro amps, i have no problems here choosing the resistor, i have a collector voltage source of 6 volts, i need 3 circuits 1 operating in cuttoff another in the operating point and the last one in saturation.

can somebody drives me to the rigth way to set this 3 circuits? or at least a link with this kind of tutorial driving you from zero to set this circuit conditions?

im studing very basic transistor circuits now, containing only the transistor the DC voltage sources and resistors.

any help?

and again please excuse my poor english and for asking too much ;-)

 

1. Cutoff
The transistor is off, therefore there is no base current flowing. Connect the base and emitter together.

2. Saturated
To observe the saturation voltage (Vce(sat)), you need to limit the collector current (Ic) or allow voltage drop across a collector resistor (Rc). If you have 6V and 100ohm Rc then the maximum current will be approx. 60mA. Find out the transistor gain at Ic=60mA from the data sheet and choose your Ib so that it is more than the gain dictated. e.g. hfe=60, Ic=60mA, to ensure saturation Ib>Ic/hfe. We refer to the actual ratio of Ic/Ib in saturation as forced gain. So if the hfe is 100 at 60mA we can ensure saturation by setting the forced gain < 100. Lower forced gain will result in slightly lower Vce(sat).

3. Linear or Operating
Refer to the saturated region setup, but instead set Ib<Ic/hfe. If you are designing, say an amplifier then for maximum swing you need to set the quiescent current approx. halfway between max Ic and 0, choose the Ib appropriately.

 

Originally posted by n9352527@Dec 16 2005, 05:20 AM
3. Linear or Operating
Refer to the saturated region setup, but instead set Ib<Ic/hfe. If you are designing, say an amplifier then for maximum swing you need to set the quiescent current approx. halfway between max Ic and 0, choose the Ib appropriately.

[post=12494]Quoted post[/post]​

ok, if max ic = 60 ma i must set the Q point at aprox 30 ma, with a transistor with hfe = 100, i must set the ib to aprox. 300 microamps?

1 more: with the collector resistor i can control the colector voltage not the collector current? so doesn't matter wich voltage or resistor i chose at collector level the current is controled by the ib, and in the case of transistor in saturation the vcc and the rc control the current and voltage drops?

thanks for your reply

 

Originally posted by terrakota+Dec 16 2005, 04:17 PM--><div class='quotetop'>QUOTE(terrakota @ Dec 16 2005, 04:17 PM)</div><div class='quotemain'>ok, if max ic = 60 ma i must set the Q point at aprox 30 ma, with a transistor with hfe = 100, i must set the ib to aprox. 300 microamps?

[post=12501]Quoted post[/post]​

[/b]

Yes. Then we encounter another problem, the hfe is not constant across the transistor. It is given as a range, say from 100 to 300. It varies with temperature and various other things. This configuration will give Vc=Vsupply-(hfe*Ib*Rc), which depends on hfe.

We need to remove this to have a stable design. That is why for CE amplifier we usually have an emitter resistor to set the Q point together with the base biasing circuit. In this case the gain is given by Rc/Re, eliminating hfe altogether.

<!--QuoteBegin-terrakota@Dec 16 2005, 04:17 PM
1 more: with the collector resistor i can control the colector voltage not the collector current? so doesn't matter wich voltage or resistor i chose at collector level the current is controled by the ib, and in the case of transistor in saturation the vcc and the rc control the current and voltage drops?

thanks for your reply

[post=12501]Quoted post[/post]​

[/quote]

Yes, the collector current is given by Ib*hfe, Rc only controls how much the voltage drop for a given Ic. Basically Rc controls the upper limit of Ic, because the maximum voltage drop is limited by the supply voltage. E.g. You can have 100 ohm Rc at 10V Vcc to get maximum Ic of 0.1A, or 1 ohm resistor at 10 V Vcc to get maximum Ic of 10A. The actual Ic depends on the hfe and Ib at a given instant. The voltage drops however are different, say at 50mA for 100 ohm Rc the drop would be 5V, but for 1 ohm Rc the drop would be 0.05V.

In saturation, the purpose of Rc is to set the Ic and Vce saturation conditions to safe values. You can observe it in a different way, for examples most Vce measurements in labs are performed with a variable supply voltage, with a fixed Ib, increasing the Vce will increase the Ic up to a point where the Ic kind of levelled off. The problem is the values of Vce and Ic for this setup are quite substantial and the transistor can't handle that kind of power. That is why labs measurements are performed with a a very short fixed width pulsed voltage/current instead (300us). For us that don't have that kind of equipment (curve tracer) then we have to observe the saturation with limited range of Ic and Vce, hence the need of Rc.

Edited:
You can see the operating region in the graph of Ic against Vce on this page:

http://www.allaboutcircuits.com/vol_3/chpt_4/4.html

The region between the original point (0,0) along the lines up to the knees when the Ic levels off, is the saturated region. Here, Ic is largely a function of Vce. If you draw a best fit line connecting the knees on the Ic lines, it would be the Vce sat line for different value of Ib and Ic.

The region where the Ic is level, is the linear region where Ic is mainly a function of Ib.

 

well thanks for your great explanation, know i have a more clear image in my mind.

thanks a lot for your help