# Slight issue with Counter Circuit

#### kereDW

Joined Mar 2, 2020
6
Hi

This is not my circuit but I needed it to work in the way I needed it for a project I am currently designing.

My challenges were to get the up and down counting to only be activated by one "button" although in reality this will be via a Photo Transistor and LED combination. This does work with what I have done but sometimes when switching from up to down via the two way switch it either adds 1 or subtracts 1.
Can anyone see the obvious that I may have missed please.

TIA

Derek

#### Attachments

• 208 KB Views: 20

#### jpanhalt

Joined Jan 18, 2008
11,088
If those "adds 1 or subtracts 1" actions are unpredictable, I suspect what you are seeing is the effect of switch bounce.

That is, opening or closing a mechanical switch can produce multiple logic pulses as the contact bounce against each other. Look up the term "switch bounce." There are hardware and software solutions.

Here's an often cited reference on the subject: http://www.ganssle.com/debouncing.pdf

The Maxim MAX6816/17/18 family of chips are hardware debouncers.

#### AlbertHall

Joined Jun 4, 2014
11,218
IC6b pin 6 could be left floating while switching SW3 and SW4. The similar IC6a pin 1 has a resistor and capacitor to ground, C1 and R20.
Put a similar combination on IC6b pin 6 so that pin is never floating.

#### kereDW

Joined Mar 2, 2020
6
IC6b pin 6 could be left floating while switching SW3 and SW4. The similar IC6a pin 1 has a resistor and capacitor to ground, C1 and R20.
Put a similar combination on IC6b pin 6 so that pin is never floating.
Tried it and the result was the same.... I have found out that if SW1 is switched to the IC6b pin six position then everytime I then move SW2 it forces the counter to go up 1 or down one.... Is it me? I thought that the U/D pin on IC3 should do the "up and down", but in this circuit it appears to be the "Clock" for up and "U/D" for down.....from everything I have read so far on this chip this isn't correct?

#### crutschow

Joined Mar 14, 2008
26,991
On some counters the clock has to be high when the U/D signal is changed to avoid a false count.
You might try that.

#### kereDW

Joined Mar 2, 2020
6
On some counters the clock has to be high when the U/D signal is changed to avoid a false count.
You might try that.
Ty...Yes tried that but made no difference......

#### dl324

Joined Mar 30, 2015
12,790
Relevant part of the schematic:

CD4029 logic diagram:

#### kereDW

Joined Mar 2, 2020
6
Ty Dennis, but at my level (I admit to being a total amateur at this) what you have put up is meaningless to me
Perhaps it could be accompanied by a simple explanation please?
I genuinely appreciate that you, like the others, are trying to be helpful but what you have displayed is for those who fully understand and I am at the beginning but trying to learn and understand
I have already improved on the circuit above by reading the logic of the IC3 chip

Last edited:

#### djsfantasi

Joined Apr 11, 2010
7,626
What is the project you are working on? Is it related to a school project?

#### kereDW

Joined Mar 2, 2020
6
What is the project you are working on? Is it related to a school project?
No I am an amateur radio enthusiast and I am attempting (it's getting close) to design and construct an antenna rotator for portable use.
Commercial rotators are very expensive and also very heavy and cumbersome. I enjoy challenges and decided to give myself this one

#### kereDW

Joined Mar 2, 2020
6