Hi Everyone

Quick question here. I am wondering if I am understanding the ISA Bus. I am doing some hobby hacking.

I want to create some passive ISA cards that won't have a microcontrollers/microprocessors. It won't be very complicated compared to the work of others.

If the ISA bus has 20 address lines, are these lines shared between all ISA cards? If I want to control a given card, will I write to certain address and certain data registers to control that card?

Do I figure out where these registers are by creating a hex range for each card?

Would the hex range work like this...

Just to oversimplify, if I have 4 cards and 1 chip on each card and each chip has a tri-state pin, then would I be able to wire an address line to each one and have 1 card active by setting that given address line high, while keeping the other 3 low?

Alternatively could I use decoder chips to create an address range that will pass through to the rest of the circuitry on an address match range?

In effect, can I think of the ISA bus as one large circuit board with room to add new sections but that those new sections must operate independently of each other and that only one section of the circuit can be active at any one time?

Thanks for reading-Patrick

 

Yes to everything. The ISA bus is a Bus - an all passive (except for terminations) interconnection system. All address and data lines, and most control lines, go to identical pins at each slot. In a full-blown system, a 20 bit address comparator monitors the address lines for an exact match to an onboard constant. If matched, it gates through the read or write strobe that is a bit delayed from the start of the address cycle. It is the strobe pulse that initiates whatever action. If a board has a block of 16 registers, then the main address comparator is only the highest 16 bits. When matched, they enable a low order 4 bit decoder to route the strobe to the appropriate register. Same basic idea as a memory board.

On IBM PC motherboards, the ISA bus was the largest section physically. But there were many other things going on on those boards. Industrial computers had all passive backplanes that distributed the connections and power and that's all. Cpu's, memory, and I/O were on other boards, and everything plugged into the backplane.

ak

 

Hmmm. Did you try googling for information on IBM PC ISA bus?

How about this for starters?

You want to read up on the Intel 8255 Programmable Peripheral Interface.
The basic 8-bit ISA bus consisted of
D0 - D7 8-bit bidirectional data lines
A0 - A15 16-bit I/O address lines
AEN Address Enable control signal from the computer
IOR I/O Read control signal from the computer
IOW I/O Write control signal from the computer.

You need to decode all 16 address lines otherwise you will be receiving commands and data intended for some other device.
You need to find out what addresses out of a total of 65536 addresses are not being used and hence available for you to use.
It was common practice to use addresses $304-$307 to access an 8255 on a prototyping board.

I will try to find an example of how to interface an 8255 to the ISA bus.

 

I'll go back to another bus which is the Q-bus used on the LSI-11 a PDP-11 computer.

this computer was addressable in words or bytes, but had a max of 32K 16 bit words of address space without memory management. The top 4 or 8K (I think) could be reserved for peripherals. They just responded to as if they were memory addresses.

Exclusive NOR gates were typically used to set the address or base address. Some peripherals had fixed addresses that they responded to. Other non-system devices say like D/A converters could be put anywhere.
DIP switches on the cards set the address.

Interrupts had both position and processor priority. the further away from the processor, the lower the interrupt priority.

A typical arrangement might be:
CPU
Memory
Disk drive
Serial interfaces
Boot card/terminator.

The bus had to be terminated. If there were blank slots, BUS grant cards had to be be the unused spots. This was basically to make the interrupt system functional.

I can;t quite remember if DMA or Direct Memory Access was available on the LSI-11, but I think it was. This was so disk drives could read directly into a block of memory without assistance from the processor.

 

Wow thanks Guys! I just washed the dishes and came back to these great answers. Very nice way to head off to bed

Thanks again!