Priority Interrupt settings PIC18F4550, running three timers

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Vindhyachal Takniki

Joined Nov 3, 2014
549
I am using PIC18F4550 with MPBALX IDE V2.26, Xc8 V1.32.

I have to run three timers. I am using three timers. I have kept osc freq = 4Mhz, so that all timers have clock of 1Mhz.
Timer0: Used for delay loops, one shot. Delay produced: 500us,1000us,10ms,50ms
Timer1: General purpose timer. Run continuously, generate 10ms interrupts.
Timer3: Generate configurable interrupt. Timer value varies from 50us-62500us.


Timer3 is highest priority interrupt. It runs only when it is required otherwise off. If any other timer interrupt is being serviced, then they should be interrupted by this higher priority interrupt.
So Timer3 should me made higher priority & other timers should be at lower priority
In PIC18F4550 how to configure two interrupts with higher & lower priority.
I have tried this but it didn't work.( http://www.xargs.com/pic/c-faq.html#c18isr )

Then I have tried this: http://microchip.wikidot.com/faq:31
Configured timer0 interrupt to lower priority & if isr have keyword "low_priority", then control never goes in it. However if I remove this keyword then control goes into isr.

Now how to configure code for higher priority for timer3. Haven't added timer3 in yet

Code:
void interrupt isr(void)
{
/* wait timer isr */
    if(INTCONbits.TMR0IF)
    {
    /* stop timer */
        T0CONbits.TMR0ON = 0U;
        INTCONbits.TMR0IF = 0U;
       
        g_wait_timer_flag = 1U;
    }

/* general timer isr */
    if(PIR1bits.TMR1IF)
    {
    /* stop, reload & restart timer */
        T1CONbits.TMR1ON = 0U;
        PIR1bits.TMR1IF = 0U;
        TMR1H = GEN_TIM_TH0; 
        TMR1L = GEN_TIM_TL0;
        T1CONbits.TMR1ON = 1U;
   
        LATBbits.LATB1 = !LATBbits.LATB1;
    }

} /* isr ends here */



void initialize_wait_timer(void)
{
/* T0CON */
    T0CONbits.TMR0ON = 0U;   /* stop timer */
    T0CONbits.T08BIT = 0U;   /* 16 bit */
    T0CONbits.T0CS = 0U;     /* internal clock */
    T0CONbits.T0SE = 0U;
    T0CONbits.PSA = 1U;      /* PSA bypass */
    T0CONbits.T0PS = 0U;     /* /2 */

/* clear timer counts */
    TMR0H = 0U;               /* clear timer register */
    TMR0L = 0U;

/* int settins */
    INTCONbits.TMR0IF = 0U;   /* clear overflow flag */
    INTCONbits.TMR0IE = 1U;   /* enable int */
    INTCON2bits.TMR0IP = 0U;  /* low priority */
    INTCONbits.GIE_GIEH = 1U; /* enable global bit */
    INTCONbits.PEIE_GIEL = 1U;
       
/* write TL & TH value */
    TMR0H = 0xFE;
    TMR0L = 0x0c;

    T0CONbits.TMR0ON = 1U;    
   
    while( 0U ==  g_wait_timer_flag );
       
} /* function ends here */




void initialize_general_timer(void) 
{
/* T1CON */
    T1CONbits.TMR1ON = 0U;   /* stop timer */
    T1CONbits.RD16 = 1U;     /* one sixteen but write */
    T1CONbits.T1RUN = 0U;
    T1CONbits.T1CKPS = 0U;
    T1CONbits.T1OSCEN = 0U;
    T1CONbits.nT1SYNC = 1U;
    T1CONbits.TMR1CS = 0U;
   
/* write tiemr counts */
    TMR1H = GEN_TIM_TH0;
    TMR1L = GEN_TIM_TL0;

/* int settins */
    PIR1bits.TMR1IF = 0U;
    PIE1bits.TMR1IE = 1U;
    IPR1bits.TMR1IP = 0U;

    INTCONbits.GIE_GIEH = 1U; /* enable global bit */
    INTCONbits.PEIE_GIEL = 1U;

/* start timer */
    T1CONbits.TMR1ON = 1U;
   
} /* function ends here */
 

nsaspook

Joined Aug 27, 2009
7,467
tried this, even mentioned it in OP
Yes, you did.:oops: Check to be sure the Priority interrupt enable flag (IPEN bit) is set for the chip you're using.
The interrupt priority feature is enabled by setting the IPEN bit (RCON<7>). When interrupt priority is enabled, there are two bits which enable interrupts globally. Setting the GIEH bit (INTCON<7>) enables all interrupts that have the priority bit set (high priority). Setting the GIEL bit (INTCON<6>) enables all interrupts that have the priority bit cleared (low priority). When the interrupt flag, enable bit and appropriate global interrupt enable bit are set, the interrupt will vector immediately to address 000008h or 000018h, depending on the priority bit setting. Individual interrupts can be disabled through their corresponding enable bits. When the IPEN bit is cleared (default state), the interrupt priority feature is disabled and interrupts are compatible with PIC® mid-range devices. In Compatibility mode, the interrupt priority bits for each source have no effect. INTCON<6> is the PEIE bit which enables/disables all peripheral interrupt sources. INTCON<7> is the GIE bit which enables/disables all interrupt sources. All interrupts branch to address 000008h in Compatibility mode.
 

dannyf

Joined Sep 13, 2015
2,197
Now how to configure code for higher priority for timer3. Haven't added timer3 in yet
Not sure what you meant by "higher priority".

You can certainly process a given interrupt flag earlier in a non-vectored isr -> the chip will respond to that interrupt (slightly) faster.

This particular chip can also process a two-priority interrupt request.

Cannot help you without your telling us what you are trying to do.
 
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